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SN74LVC543APWTE4 PDF预览

SN74LVC543APWTE4

更新时间: 2024-11-05 05:16:59
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12页 203K
描述
OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVC543APWTE4 数据手册

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SN74LVC543A  
OCTAL REGISTERED TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS299HJANUARY 1993REVISED MARCH 2005  
FEATURES  
DB, DW, OR PW PACKAGE  
(TOP VIEW)  
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 7 ns at 3.3 V  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
LEBA  
OEBA  
A1  
V
CC  
2
CEBA  
B1  
Typical VOLP (Output Ground Bounce)  
3
<0.8 V at VCC = 3.3 V, TA = 25°C  
4
A2  
B2  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
5
A3  
B3  
6
A4  
B4  
7
Supports Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With  
A5  
B5  
8
A6  
B6  
9
3.3-V VCC  
)
A7  
B7  
10  
11  
12  
A8  
CEAB  
GND  
B8  
LEAB  
OEAB  
Ioff Supports Partial-Power-Down Mode  
Operation  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
DESCRIPTION/ORDERING INFORMATION  
This octal registered transceiver is designed for 1.65-V to 3.6-V VCC operation.  
The SN74LVC543A contains two sets of D-type latches for temporary storage of data flowing in either direction.  
Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register  
to permit independent control in either direction of data flow.  
The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and  
LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB places the A  
latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the  
data present at the output of the A latches. Data flow for B to A is similar to that of A to B, but uses CEBA, LEBA,  
and OEBA.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVC543ADW  
TOP-SIDE MARKING  
LVC543A  
Tube of 25  
SOIC – DW  
SSOP – DB  
Reel of 2000  
Reel of 2000  
Tube of 60  
SN74LVC543ADWR  
SN74LVC543ADBR  
SN74LVC543APW  
LC543A  
LC543A  
–40°C to 85°C  
TSSOP – PW  
Reel of 2000  
Reel of 250  
SN74LVC543APWR  
SN74LVC543APWT  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74LVC543APWTE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC543APWR TI

完全替代

OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVC543APW TI

完全替代

OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVC543ADW TI

完全替代

OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

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