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SN74LVC543PW PDF预览

SN74LVC543PW

更新时间: 2024-11-05 23:06:23
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6页 102K
描述
OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVC543PW 数据手册

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SN74LVC543  
OCTAL REGISTERED TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS299A – JANUARY 1993 – REVISED JULY 1995  
DB, DW, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
LEBA  
OEBA  
A1  
1
2
3
4
5
6
7
8
9
10  
24  
V
CC  
= 3.3 V, T = 25°C  
CC  
A
23 CEBA  
22 B1  
21 B2  
20 B3  
19 B4  
18 B5  
17 B6  
16 B7  
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
OH  
= 3.3 V, T = 25°C  
CC  
A
A2  
A3  
A4  
A5  
A6  
A7  
A8  
Latch-Up Performance Exceeds 250 mA  
Per JEDEC Standard JESD-17  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages  
15  
B8  
CEAB 11  
GND 12  
14 LEAB  
13 OEAB  
description  
This octal registered transceiver is designed for  
2.7-V to 3.6-V V operation.  
CC  
The SN74LVC543 contains two sets of D-type latches for temporary storage of data flowing in either direction.  
Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each  
register to permit independent control in either direction of data flow.  
The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and  
LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB places the A  
latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the  
data present at the output of the A latches. Data flow for B to A is similar to that of A to B but uses CEBA, LEBA,  
and OEBA.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN74LVC543 is characterized for operation from 40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
B
CEAB  
LEAB  
OEAB  
A
H
X
L
L
L
X
X
H
L
X
H
L
X
X
X
L
Z
Z
B
0
L
L
L
L
H
H
A-to-B data flow is shown; B-to-A flow control is the  
same except that it uses CEBA, LEBA, and OEBA.  
Output level before the indicated steady-state input  
conditions were established  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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