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SN74LVC2G17-Q1 PDF预览

SN74LVC2G17-Q1

更新时间： 2024-11-18 05:29:31
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
7页 119K
描述
DUAL SCHMITT-TRIGGER BUFFER

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中文翻译

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SN74LVC2G17-Q1 数据手册

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SCES618 − OCTOBER 2004  
D
Qualification in Accordance With  
AEC-Q100  
D
D
D
I
Supports Partial-Power-Down Mode  
off  
†
Operation  
D
Qualified for Automotive Applications  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 1000-V Charged-Device Model (C101)  
D
D
D
D
D
D
Supports 5-V V  
Operation  
CC  
Inputs Accept Voltages to 5.5 V  
DBV OR DCK PACKAGE  
(TOP VIEW)  
Max t of 5.4 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
CC  
1
2
3
6
5
4
24-mA Output Drive at 3.3 V  
1A  
GND  
2A  
1Y  
V
2Y  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
CC  
OLP  
CC  
= 3.3 V, T = 25°C  
A
D
Typical V  
(Output V  
Undershoot)  
OHV  
OH  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
†
Contact factory for details. Q100 qualification data available on  
request.  
description/ordering information  
This dual Schmitt-trigger buffer is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The SN74LVC2G17 contains two buffers and performs the Boolean function Y = A. The device functions as two  
independent buffers, but because of Schmitt action, it may have different input threshold levels for positive-going  
(V ) and negative-going (V ) signals.  
T+  
T−  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
‡
SOT (SOT-23) − DBV  
SOT (SC-70) − DCK  
Reel of 3000  
Reel of 3000  
SN74LVC2G17QDBVRQ1  
SN74LVC2G17QDCKRQ1  
C17_  
−40°C to 125°C  
C7_  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
FUNCTION TABLE  
(each inverter)  
INPUT  
A
OUTPUT  
Y
H
L
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

中文翻译

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SN74LVC2G17-Q1 替代型号

型号 品牌 替代类型 描述 数据表
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