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SN74LVC2G240YEPR PDF预览

SN74LVC2G240YEPR

更新时间: 2024-11-03 22:08:39
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
13页 329K
描述
DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

SN74LVC2G240YEPR 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢇꢃ ꢉ  
ꢊꢋꢌ ꢄ ꢍꢋꢎ ꢎ ꢏ ꢐꢑ ꢊꢐ ꢒ ꢅꢏ ꢐ  
ꢓ ꢒꢔ ꢕ ꢖ ꢗꢀꢔꢌꢔ ꢏ ꢘ ꢋꢔ ꢙ ꢋꢔꢀ  
SCES208F − APRIL 1999 − REVISED SEPTEMBER 2003  
DCT OR DCU PACKAGE  
(TOP VIEW)  
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
D
D
D
D
D
D
Supports 5-V V  
Operation  
CC  
1OE  
1A  
2Y  
V
CC  
2OE  
1Y  
2A  
1
2
3
4
8
7
6
5
Inputs Accept Voltages to 5.5 V  
Max t of 4.6 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
GND  
CC  
24-mA Output Drive at 3.3 V  
YEA, YEP, YZA, OR YZP PACKAGE  
(BOTTOM VIEW)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
OLP  
CC  
A
D
D
D
D
Typical V  
(Output V  
Undershoot)  
OHV  
OH  
4 5  
3 6  
2 7  
1 8  
GND  
2Y  
1A  
2A  
1Y  
2OE  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
I
Supports Partial-Power-Down Mode  
off  
Operation  
1OE  
V
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
This dual buffer/driver is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The SN74LVC2G240 is designed specifically to improve the performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented receivers and transmitters.  
NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
NanoStar− WCSP (DSBGA)  
0.17-mm Small Bump − YEA  
SN74LVC2G240YEAR  
SN74LVC2G240YZAR  
SN74LVC2G240YEPR  
SN74LVC2G240YZPR  
NanoFree− WCSP (DSBGA)  
0.17-mm Small Bump − YZA (Pb-free)  
Tape and reel  
_ _ _CK_  
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
−40°C to 85°C  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
SSOP − DCT  
Tape and reel SN74LVC2G240DCTR  
Tape and reel SN74LVC2G240DCUR  
C40_ _ _  
C40_  
VSSOP − DCU  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,  
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition  
(1 = SnPb, = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
ꢔꢥ  
Copyright 2003, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC2G240YEPR 替代型号

型号 品牌 替代类型 描述 数据表
NC7WZ240L8X FAIRCHILD

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