5秒后页面跳转
捷配首页

Datasheet > 暂无类别数据> SN74LVC2G240YEPR
SN74LVC2G240YEPR PDF预览

SN74LVC2G240YEPR

更新时间： 2024-11-17 22:08:39
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
13页 329K
描述
DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74LVC2G240YEPR 数据手册

 浏览型号SN74LVC2G240YEPR的Datasheet PDF文件第2页浏览型号SN74LVC2G240YEPR的Datasheet PDF文件第3页浏览型号SN74LVC2G240YEPR的Datasheet PDF文件第4页浏览型号SN74LVC2G240YEPR的Datasheet PDF文件第5页浏览型号SN74LVC2G240YEPR的Datasheet PDF文件第6页浏览型号SN74LVC2G240YEPR的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢇꢃ ꢉ  
ꢊꢋꢌ ꢄ ꢍꢋꢎ ꢎ ꢏ ꢐꢑ ꢊꢐ ꢒ ꢅꢏ ꢐ  
ꢓ ꢒꢔ ꢕ ꢖ ꢗꢀꢔꢌꢔ ꢏ ꢘ ꢋꢔ ꢙ ꢋꢔꢀ  
SCES208F − APRIL 1999 − REVISED SEPTEMBER 2003  
DCT OR DCU PACKAGE  
(TOP VIEW)  
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
D
D
D
D
D
D
Supports 5-V V  
Operation  
CC  
1OE  
1A  
2Y  
V
CC  
2OE  
1Y  
2A  
1
2
3
4
8
7
6
5
Inputs Accept Voltages to 5.5 V  
Max t of 4.6 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
GND  
CC  
24-mA Output Drive at 3.3 V  
YEA, YEP, YZA, OR YZP PACKAGE  
(BOTTOM VIEW)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
OLP  
CC  
A
D
D
D
D
Typical V  
(Output V  
Undershoot)  
OHV  
OH  
4 5  
3 6  
2 7  
1 8  
GND  
2Y  
1A  
2A  
1Y  
2OE  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
I
Supports Partial-Power-Down Mode  
off  
Operation  
1OE  
V
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
This dual buffer/driver is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The SN74LVC2G240 is designed specifically to improve the performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented receivers and transmitters.  
NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
‡
NanoStar− WCSP (DSBGA)  
0.17-mm Small Bump − YEA  
SN74LVC2G240YEAR  
SN74LVC2G240YZAR  
SN74LVC2G240YEPR  
SN74LVC2G240YZPR  
NanoFree− WCSP (DSBGA)  
0.17-mm Small Bump − YZA (Pb-free)  
Tape and reel  
_ _ _CK_  
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
−40°C to 85°C  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
SSOP − DCT  
Tape and reel SN74LVC2G240DCTR  
Tape and reel SN74LVC2G240DCUR  
C40_ _ _  
C40_  
VSSOP − DCU  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,  
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition  
(1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
ꢙ
ꢙ
ꢐ
ꢘ
ꢩ
ꢊ
ꢤ
ꢋ
ꢆ
ꢢ
ꢔ
ꢣ
ꢒ
ꢝ
ꢘ
ꢛ
ꢁ
ꢜ
ꢊ
ꢌ
ꢔ
ꢌ
ꢚ
ꢛ
ꢥ
ꢜ
ꢝ
ꢣ
ꢞ
ꢟ
ꢠ
ꢠ
ꢡ
ꢡ
ꢚ
ꢚ
ꢝ
ꢝ
ꢛ
ꢛ
ꢚ
ꢢ
ꢢ
ꢦ
ꢣ
ꢤ
ꢞ
ꢞ
ꢥ
ꢥ
ꢛ
ꢡ
ꢠ
ꢟ
ꢢ
ꢢ
ꢝ
ꢜ
ꢦ
ꢔꢥ  
ꢤ
ꢧ
ꢢ
ꢨ
ꢚ
ꢣ
ꢠ
ꢢ
ꢡ
ꢚ
ꢡ
ꢝ
ꢞ
ꢛ
ꢤ
ꢩ
ꢠ
ꢛ
ꢡ
ꢡ
ꢥ
ꢢ
ꢪ
Copyright 2003, Texas Instruments Incorporated  
ꢞ
ꢝ
ꢣ
ꢡ
ꢝ
ꢞ
ꢟ
ꢡ
ꢝ
ꢢ
ꢦ
ꢚ
ꢜ
ꢚ
ꢣ
ꢥ
ꢞ
ꢡ
ꢫ
ꢡ
ꢥ
ꢞ
ꢝ
ꢜ
ꢬ
ꢠ
ꢒ
ꢛ
ꢟ
ꢥ
ꢢ
ꢡ
ꢠ
ꢛ
ꢩ
ꢠ
ꢞ
ꢩ
ꢭ
ꢠ
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
ꢞ
ꢞ
ꢠ
ꢛ
ꢡ
ꢮ
ꢪ
ꢙ
ꢞ
ꢝ
ꢩ
ꢤ
ꢣ
ꢡ
ꢚ
ꢝ
ꢛ
ꢦ
ꢞ
ꢝ
ꢣ
ꢥ
ꢢ
ꢢ
ꢚ
ꢛ
ꢯ
ꢩ
ꢝ
ꢥ
ꢢ
ꢛ
ꢝ
ꢡ
ꢛ
ꢥ
ꢣ
ꢥ
ꢢ
ꢢ
ꢠ
ꢞ
ꢚ
ꢨ
ꢮ
ꢚ
ꢛ
ꢣ
ꢨ
ꢤ
ꢩ
ꢥ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

中文翻译

下载PDF

SN74LVC2G240YEPR 替代型号

型号 品牌 替代类型 描述 数据表
NC7WZ240L8X FAIRCHILD

类似代替

 TinyLogic. UHS Dual Inverting Buffer with 3-STATE Outputs
SN74LVC2G240YZAR TI

功能相似

 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC2G240YEAR TI

功能相似

 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

与SN74LVC2G240YEPR相关器件

型号 品牌 获取价格 描述 数据表
SN74LVC2G240YZAR TI

获取价格

 		DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC2G240YZPR TI

获取价格

 		DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC2G241 TI

获取价格

 		DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC2G241_15 TI

获取价格

 		Dual Buffer and Driver With 3-State Outputs
SN74LVC2G241DCTR ROCHESTER

获取价格

 		LVC/LCX/Z SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, PDSO8, GREEN, PLASTIC, SSOP-8
SN74LVC2G241DCTR TI

获取价格

 		DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC2G241DCU TI

获取价格

 		LVC/LCX/Z SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, PDSO8, PLASTIC, TSSOP-8
SN74LVC2G241DCUR TI

获取价格

 		DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC2G241DCUR ROCHESTER

获取价格

 		LVC/LCX/Z SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, PDSO8, GREEN, PLASTIC, VSSOP-8
SN74LVC2G241DCUT TI

获取价格

 		DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

与SN74LVC2G240YEPR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证