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SN74LVC2G32-EP

更新时间： 2024-09-28 12:15:03
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
11页 420K
描述
DUAL 2-INPUT POSITIVE-OR GATE

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SN74LVC2G32-EP 数据手册

 浏览型号SN74LVC2G32-EP的Datasheet PDF文件第2页浏览型号SN74LVC2G32-EP的Datasheet PDF文件第3页浏览型号SN74LVC2G32-EP的Datasheet PDF文件第4页浏览型号SN74LVC2G32-EP的Datasheet PDF文件第5页浏览型号SN74LVC2G32-EP的Datasheet PDF文件第6页浏览型号SN74LVC2G32-EP的Datasheet PDF文件第7页 
SN74LVC2G32-EP  
DUAL 2-INPUT POSITIVE-OR GATE  
www.ti.com  
SCES543A–FEBRUARY 2004–REVISED AUGUST 2006  
FEATURES  
•
Controlled Baseline  
•
•
•
•
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
– One Assembly/Test Site, One Fabrication  
Site  
Ioff Supports Partial Power-Down-Mode  
Operation  
•
•
Extended Temperature Performance of –55°C  
to 125°C  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
•
•
•
•
•
•
•
•
Enhanced Product-Change Notification  
(1)  
Qualification Pedigree  
Supports 5-V VCC Operation  
– 1000-V Charged-Device Model (C101)  
Inputs Accept Voltages to 5.5 V  
Max tpd of 3.8 ns at 3.3 V  
DCU PACKAGE  
(TOP VIEW)  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
1A  
1B  
2Y  
V
CC  
1
2
3
4
8
7
6
5
1Y  
2B  
2A  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
GND  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION/ORDERING INFORMATION  
This dual 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.  
Y + A ) B or Y + A • B  
The SN74LVC2G32 performs the Boolean function  
in positive logic.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
–55°C to 125°C  
SSOP – DCU  
Reel of 3000  
SN74LVC2G32MDCUREP  
BUE  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCU: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
FUNCTION TABLE  
(EACH GATE)  
INPUTS  
OUTPUT  
Y
A
H
X
L
B
X
H
L
H
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...11

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SN74LVC2G32-EP 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC2G32-Q1 TI

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