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SN74LVC2G17-EP PDF预览

SN74LVC2G17-EP

更新时间: 2024-09-26 12:47:03
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德州仪器 - TI /
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12页 542K
描述
DUAL SCHMITT-TRIGGER BUFFER

SN74LVC2G17-EP 数据手册

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SN74LVC2G17-EP  
DUAL SCHMITT-TRIGGER BUFFER  
www.ti.com  
SCES683JANUARY 2007  
FEATURES  
Controlled Baseline  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
One Assembly/Test Site, One Fabrication  
Site  
Ioff Supports Partial-Power-Down Mode  
Operation  
Enhanced Diminishing Manufacturing Sources  
(DMS) Support  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Enhanced Product-Change Notification  
(1)  
ESD Protection Exceeds JESD 22  
Qualification Pedigree  
2000-V Human-Body Model (A114-A)  
1000-V Charged-Device Model (C101)  
Customer-Specific Configuration Control Can  
Be Supported Along With Major-Change  
Approval  
DCK PACKAGE  
(TOP VIEW)  
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Max tpd of 5.4 ns at 3.3 V  
1
2
3
6
5
4
1A  
GND  
2A  
1Y  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
VCC  
2Y  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION/ORDERING INFORMATION  
This dual Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCC operation.  
The SN74LVC2G17 contains two buffers and performs the Boolean function Y = A. The device functions as two  
independent buffers, but because of Schmitt action, it may have different input threshold levels for positive-going  
(VT+) and negative-going (VT–) signals.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
BZV  
–55°C to 125°C  
SOT (SC-70) – DCK  
Reel of 3000  
SN74LVC2G17MDCKREP  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCK: The actual top-side marking has one additional character that designates the assembly/test site. Pin 1 identifier indicates  
solder-bump composition (1 = SnPb, = Pb-free).  
FUNCTION TABLE  
(EACH INVERTER)  
INPUT  
A
OUTPUT  
Y
H
L
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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