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SN74GTL2007PWR PDF预览

SN74GTL2007PWR

更新时间: 2024-11-26 04:31:15
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
10页 173K
描述
12-BIT GTL-/GTL/GTL+ TO LVTTL TRANSLATOR

SN74GTL2007PWR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SSOP
包装说明:TSSOP, TSSOP28,.25针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.43最大延迟:10 ns
输入特性:STANDARD接口集成电路类型:GTL TO TTL TRANSCEIVER
JESD-30 代码:R-PDSO-G28JESD-609代码:e4
长度:9.7 mm湿度敏感等级:1
位数:12功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
输出锁存器或寄存器:LATCH输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP28,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Other Interface ICs
最大压摆率:12 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:BIPOLAR
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

SN74GTL2007PWR 数据手册

 浏览型号SN74GTL2007PWR的Datasheet PDF文件第2页浏览型号SN74GTL2007PWR的Datasheet PDF文件第3页浏览型号SN74GTL2007PWR的Datasheet PDF文件第4页浏览型号SN74GTL2007PWR的Datasheet PDF文件第5页浏览型号SN74GTL2007PWR的Datasheet PDF文件第6页浏览型号SN74GTL2007PWR的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄ ꢅꢆꢇ ꢈꢈ ꢂ  
ꢄꢅ  
SCLS609 − MARCH 2005  
PW PACKAGE  
(TOP VIEW)  
D
Operates as a GTL-/GTL/GTL+ to LVTTL or  
LVTTL to GTL-/GTL/GTL+ Translator  
D
Series Termination on TTL Outputs of 30  
V
V
CC  
1BI  
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
REF  
D
Latch-Up Testing Done to JEDEC Standard  
JESD 78  
1AO  
2AO  
5A  
2BI  
7BO1  
D
ESD Performance Tested Per JESD 22  
− 2000-V Human-Body Model  
(A114-B, Class II)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
6A  
24 7BO2  
EN1  
11BI  
11A  
9BI  
EN2  
11BO  
23  
22  
21 5BI  
20 6BI  
description/ordering information  
3AO 10  
4AO 11  
19 3BI  
18 4BI  
The SN74GTL2007 is a 12-bit translator to  
interface between the 3.3-V LVTTL chip set I/O  
and the Xeonprocessor GTL-/GTL/GTL+ I/O.  
The device is designed for platform health  
management in dual-processor applications.  
10AI1 12  
10AI2 13  
GND 14  
17 10BO1  
16 10BO2  
15 9AO  
PIN DESCRIPTION  
PIN NUMBER SYMBOL  
NAME AND FUNCTION  
GTL reference voltage  
1
V
REF  
2-6, 8, 10-13,  
15, 23  
ENn  
nAn  
Data and enable inputs/outputs (LVTTL)  
Data inputs/outputs (GTL−/GTL/GTL+)  
7, 9, 16,  
17−22, 24−27  
nBn  
14  
28  
GND  
Ground (0 V)  
V
CC  
Positive supply voltage  
ORDERING INFORMATION  
ORDERABLE  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PART NUMBER  
SN74GTL2007PW  
SN74GTL2007PWR  
Tube  
−40°C to 85°C TSSOP − PW  
GK2007  
Tape and reel  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
ꢅꢢ  
Copyright 2005, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74GTL2007PWR 替代型号

型号 品牌 替代类型 描述 数据表
SN74GTL2007PWRG4 TI

完全替代

12-BIT GTL-/GTL/GTL+ TO LVTTL TRANSLATOR
SN74GTL2007PWRE4 TI

类似代替

12-BIT GTL-/GTL/GTL+ TO LVTTL TRANSLATOR
SN74GTL2007PW TI

类似代替

12-BIT GTL-/GTL/GTL+ TO LVTTL TRANSLATOR

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4 位 LVTTL 至 GTL 收发器