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SN74F374NSRE4 PDF预览

SN74F374NSRE4

更新时间: 2024-11-24 04:51:11
品牌 Logo 应用领域
德州仪器 - TI 触发器逻辑集成电路光电二极管输出元件驱动
页数 文件大小 规格书
17页 690K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

SN74F374NSRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, DIP20,.3针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.22系列:F/FAST
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.6 mm逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:70000000 Hz最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):86 mA
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:5.3 mmBase Number Matches:1

SN74F374NSRE4 数据手册

 浏览型号SN74F374NSRE4的Datasheet PDF文件第2页浏览型号SN74F374NSRE4的Datasheet PDF文件第3页浏览型号SN74F374NSRE4的Datasheet PDF文件第4页浏览型号SN74F374NSRE4的Datasheet PDF文件第5页浏览型号SN74F374NSRE4的Datasheet PDF文件第6页浏览型号SN74F374NSRE4的Datasheet PDF文件第7页 
ꢉ ꢊꢋꢌꢍꢈꢎ ꢏꢐ ꢎꢑꢋ ꢒꢓ ꢐꢐ ꢎꢒ ꢎꢏꢈ ꢏꢑꢋ ꢔꢕ ꢎꢈꢄ ꢍ ꢓꢕ ꢑ ꢄꢍꢉ ꢕ  
SDFS077A − D2932, MARCH 1987 − REVISED OCTOBER 1993  
SN54F374 . . . J PACKAGE  
SN74F374 . . . DB, DW, OR N PACKAGE  
(TOP VIEW)  
Eight D-Type Flip-Flops in a Single Package  
3-State Bus-Driving True Outputs  
Full Parallel Access for Loading  
Buffered Control Inputs  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
8Q  
8D  
7D  
7Q  
6Q  
6D  
Package Options Include Plastic  
Small-Outline (SOIC) and Shrink  
Small-Outline (SSOP) Packages, Ceramic  
Chip Carriers, and Plastic and Ceramic  
DIPs  
13 5D  
12 5Q  
description  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
11  
GND  
CLK  
SN54F374 . . . FK PACKAGE  
(TOP VIEW)  
The eight flip-flops of the F374 are edge-triggered  
D-type flip-flops. On the positive transition of the  
clock (CLK) input, the Q outputs are set to the logic  
levels that were set up at the data (D) inputs.  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
4
5
6
7
8
17  
16  
15  
A buffered output enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low) or a high-impedance state. In  
the high-impedance state, the outputs neither  
load nor drive the bus lines significantly. The  
high-impedance state and the increased drive  
provide the capability to drive bus lines without  
need for interface or pullup components.  
14 6D  
9 10 11 12 13  
The output enable (OE) input does not affect internal operations of the flip-flop. Old data can be retained or new  
data can be entered while the outputs are in the high-impedance state.  
The SN74F374 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54F374 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74F374 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
H
L
L
L
H or L  
X
X
X
Q
0
H
Z
ꢋꢤ  
Copyright 1993, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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