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SN74F377A_16 PDF预览

SN74F377A_16

更新时间: 2024-11-25 02:58:47
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德州仪器 - TI /
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5页 71K
描述
OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE

SN74F377A_16 数据手册

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SN74F377A  
OCTAL D-TYPE FLIP-FLOP  
WITH CLOCK ENABLE  
SDFS018D – D2932, MARCH 1987 – REVISED OCTOBER 1993  
DW OR N PACKAGE  
(TOP VIEW)  
Contains Eight D-Type Flip-Flops  
With Single-Rail Outputs  
Clock Enable Latched to Avoid False  
CE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
Clocking  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
Applications Include:  
Buffer/Storage Registers  
Shift Registers  
Pattern Generators  
Buffered Common Enable Input  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
GND 10  
11 CLK  
description  
The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The  
SN74F377A features a latched clock enable (CE) input.  
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the  
positive-going edge of the clock pulse if CE is low. Clock triggering occurs at a particular voltage level and is  
not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input  
signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the CE  
input.  
The SN74F377A is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
CE  
H
L
CLK  
D
X
H
L
X
Q
0
H
L
L
X
L
X
Q
0
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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