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SN74F377ADWRG4 PDF预览

SN74F377ADWRG4

更新时间: 2024-11-27 15:52:11
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
12页 569K
描述
F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SO-20

SN74F377ADWRG4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:GREEN, PLASTIC, SO-20针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.38Is Samacsys:N
其他特性:WITH HOLD MODE系列:F/FAST
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.8 mm逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:110000000 Hz最大I(ol):0.02 A
湿度敏感等级:1位数:8
功能数量:1端子数量:20
最高工作温度:70 °C最低工作温度:
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):90 mA
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.5 mm最小 fmax:110 MHz
Base Number Matches:1

SN74F377ADWRG4 数据手册

 浏览型号SN74F377ADWRG4的Datasheet PDF文件第2页浏览型号SN74F377ADWRG4的Datasheet PDF文件第3页浏览型号SN74F377ADWRG4的Datasheet PDF文件第4页浏览型号SN74F377ADWRG4的Datasheet PDF文件第5页浏览型号SN74F377ADWRG4的Datasheet PDF文件第6页浏览型号SN74F377ADWRG4的Datasheet PDF文件第7页 
SN74F377A  
OCTAL D-TYPE FLIP-FLOP  
WITH CLOCK ENABLE  
SDFS018D – D2932, MARCH 1987 – REVISED OCTOBER 1993  
DW OR N PACKAGE  
(TOP VIEW)  
Contains Eight D-Type Flip-Flops  
With Single-Rail Outputs  
Clock Enable Latched to Avoid False  
CE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
Clocking  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
Applications Include:  
Buffer/Storage Registers  
Shift Registers  
Pattern Generators  
Buffered Common Enable Input  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
GND 10  
11 CLK  
description  
The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The  
SN74F377A features a latched clock enable (CE) input.  
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the  
positive-going edge of the clock pulse if CE is low. Clock triggering occurs at a particular voltage level and is  
not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input  
signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the CE  
input.  
The SN74F377A is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
CE  
H
L
CLK  
D
X
H
L
X
Q
0
H
L
L
X
L
X
Q
0
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74F377ADWRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74F377ADWG4 TI

完全替代

Octal D-Type Flip-Flop With Clock Enable 20-SOIC 0 to 70
SN74F377ADWR TI

类似代替

Octal D-Type Flip-Flop With Clock Enable 20-SOIC 0 to 70

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