是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | SOP, SOP16,.25 | Reach Compliance Code: | not_compliant |
风险等级: | 5.83 | JESD-30 代码: | R-PDSO-G16 |
逻辑集成电路类型: | J-K FLIP-FLOP | 最大频率@ Nom-Sup: | 90000000 Hz |
最大I(ol): | 0.02 A | 功能数量: | 2 |
端子数量: | 16 | 最高工作温度: | 70 °C |
最低工作温度: | 封装主体材料: | PLASTIC/EPOXY | |
封装代码: | SOP | 封装等效代码: | SOP16,.25 |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
电源: | 5 V | 最大电源电流(ICC): | 17 mA |
子类别: | FF/Latches | 标称供电电压 (Vsup): | 5 V |
表面贴装: | YES | 技术: | TTL |
温度等级: | COMMERCIAL | 端子形式: | GULL WING |
端子节距: | 1.27 mm | 端子位置: | DUAL |
触发器类型: | POSITIVE EDGE | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SN74F109DE4 | TI |
获取价格 |
F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 | |
SN74F109DG4 | TI |
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F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 | |
SN74F109DR | TI |
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DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | |
SN74F109DRE4 | TI |
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Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70 | |
SN74F109DRG4 | TI |
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DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | |
SN74F109N | TI |
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DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | |
SN74F109N-10 | TI |
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F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 | |
SN74F109N3 | TI |
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IC,FLIP-FLOP,DUAL,J/K TYPE,F-TTL,DIP,16PIN,PLASTIC | |
SN74F109N3 | ROCHESTER |
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J-Kbar Flip-Flop | |
SN74F10D | TI |
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TRIPLE 3-INPUT POSITIVE-NAND GATES |