SN74AUC1G04YEPR

更新时间： 2024-10-31 22:09:51

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
12页	309K
描述
SINGLE INVERTER GATE

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数据手册
替代型号

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SN74AUC1G04YEPR 数据手册

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢃ

ꢀꢊ ꢁꢈ ꢋ ꢌ ꢊꢁ ꢍꢌꢎ ꢏꢌ ꢎ ꢈ ꢄꢏꢌ

SCES370L − SEPTEMBER 2001 − REVISED NOVEMBER 2003

DBV OR DCK PACKAGE

(TOP VIEW)

Available in the Texas Instruments

NanoStar and NanoFree Packages

Optimized for 1.8-V Operation and Is 3.6-V

I/O Tolerant to Support Mixed-Mode Signal

Operation

GND

Supports Partial-Power-Down Mode

off

Operation

NC − No internal connection

Sub 1-V Operable

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

Max t of 2.2 ns at 1.8 V

Low Power Consumption, 10-µA Max I

3 4

GND

DNU

8-mA Output Drive at 1.8 V

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

1 5

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

DNU − Do not use

− 1000-V Charged-Device Model (C101)

description/ordering information

This single inverter gate is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.65-V to 1.95-V

operation.

The SN74AUC1G04 performs the Boolean function Y = A.

NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,

off

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

‡

NanoStar − WCSP (DSBGA)

0.17-mm Small Bump − YEA

SN74AUC1G04YEAR

NanoFree − WCSP (DSBGA)

0.17-mm Small Bump − YZA (Pb-free)

SN74AUC1G04YZAR

SN74AUC1G04YEPR

SN74AUC1G04YZPR

Tape and reel

_ _ _UC_

NanoStar − WCSP (DSBGA)

0.23-mm Large Bump − YEP

−40°C to 85°C

NanoFree − WCSP (DSBGA)

0.23-mm Large Bump − YZP (Pb-free)

SOT (SOT-23) − DBV

SOT (SC-70) − DCK

Tape and reel

SN74AUC1G04DBVR

SN74AUC1G04DCKR

U04_

UC_

†

‡

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,

and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition

^{(1 = SnPb,}• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar and NanoFree are trademarks of Texas Instruments.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...12

中文翻译

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SN74AUC1G04YEPR 替代型号

型号	品牌	替代类型	描述	数据表
SN74AUC1G04YZAR	TI	完全替代	SINGLE INVERTER GATE
SN74AUC1G04YZPR	TI	完全替代	SINGLE INVERTER GATE
SN74AUC1G04YEAR	TI	完全替代	SINGLE INVERTER GATE

与SN74AUC1G04YEPR相关器件

型号	品牌	获取价格	描述	数据表
SN74AUC1G04YZAR	TI	获取价格	SINGLE INVERTER GATE
SN74AUC1G04YZPR	TI	获取价格	SINGLE INVERTER GATE
SN74AUC1G06	TI	获取价格	SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
SN74AUC1G06_09	TI	获取价格	SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
SN74AUC1G06DBVR	TI	获取价格	SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
SN74AUC1G06DBVRE4	TI	获取价格	SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
SN74AUC1G06DBVRG4	TI	获取价格	SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
SN74AUC1G06DCKR	TI	获取价格	SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
SN74AUC1G06DCKRE4	TI	获取价格	SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT
SN74AUC1G06DCKRG4	TI	获取价格	SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT

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