Datasheet > SN74ACT3641PQ

SN74ACT3641PQ

更新时间： 2024-11-14 23:03:11

品牌	Logo	应用领域
德州仪器 - TI		存储
页数	文件大小	规格书
26页	380K
描述
1024 】 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY

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SN74ACT3641PQ 数据手册

SN74ACT3641

1024 × 36

CLOCKED FIRST-IN, FIRST-OUT MEMORY

SCAS338C – JANUARY 1994 – REVISED OCTOBER 1997

Free-Running CLKA and CLKB Can Be

Asynchronous or Coincident

Output-Ready and Almost-Empty Flags

Synchronized by CLKB

Clocked FIFO Buffering Data From Port A

to Port B

Low-Power 0.8-µm Advanced CMOS

Technology

Memory Size: 1024 × 36

Supports Clock Frequencies up to 67 MHz

Fast Access Times of 11 ns

Synchronous Read-Retransmit Capability

Mailbox Register in Each Direction

Pin-to-Pin Compatible With the

SN74ACT3631 and SN74ACT3651

Programmable Almost-Full and

Almost-Empty Flags

Package Options Include 120-Pin Thin

Quad Flat (PCB) and 132-Pin Plastic Quad

Flat (PQ) Packages

Microprocessor Interface Control Logic

Input-Ready and Almost-Full Flags

Synchronized by CLKA

description

The SN74ACT3641 is a high-speed, low-power, CMOS clocked FIFO memory. It supports clock frequencies

up to 67 MHz and has read access times as fast as 12 ns. The 1024 × 36 dual-port SRAM FIFO buffers data

from port A to port B. The FIFO memory has retransmit capability, which allows previously read data to be

accessed again. The FIFO has flags to indicate empty and full conditions and two programmable flags (almost

full and almost empty) to indicate when a selected number of words is stored in memory. Communication

between each port takes place with two 36-bit mailbox registers. Each mailbox register has a flag to signal when

new mail has been stored. Two or more devices are used in parallel to create wider datapaths. Expansion is

also possible in word depth.

The SN74ACT3641 is a clocked FIFO, which means each port employs a synchronous interface. All data

transfersthroughaportaregatedtothelow-to-hightransitionofacontinuous(free-running)portclockbyenable

signals. The continuous clocks for each port are independent of one another and can be asynchronous or

coincident. The enables for each port are arranged to provide a simple interface between microprocessors

and/or buses with synchronous control.

The input-ready (IR) flag and almost-full (AF) flag of the FIFO are two-stage synchronized to CLKA. The

output-ready (OR) flag and almost-empty (AE) flag of the FIFO are two-stage synchronized to CLKB. Offset

values for the AF and AE flags of the FIFO can be programmed from port A or through a serial input.

The SN74ACT3641 is characterized for operation from 0°C to 70°C.

For more information on this device family, see the following application reports:

•

FIFO Patented Synchronous Retransmit: Programmable DSP-Interface Application for FIR Filtering

(literature number SCAA009)

FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control

(literature number SCAA007)

Metastability Performance of Clocked FIFOs (literature number SCZA004)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...26

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与SN74ACT3641PQ相关器件

型号	品牌	获取价格	描述	数据表
SN74ACT3651	TI	获取价格	2048 】 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT3651PCB	TI	获取价格	2048 】 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT3651PQ	TI	获取价格	2048 】 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT373	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT373DB	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT373DBLE	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT373DBR	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT373DBRE4	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT373DBRG4	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT373DW	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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