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SN74AC11620DW PDF预览

SN74AC11620DW

更新时间: 2024-09-15 14:44:51
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 110K
描述
AC SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO24, PLASTIC, SOIC-24

SN74AC11620DW 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84系列:AC
JESD-30 代码:R-PDSO-G24长度:15.4 mm
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE传播延迟(tpd):10.2 ns
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

SN74AC11620DW 数据手册

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ꢀ ꢁꢂ ꢃ ꢄꢄꢅ ꢆꢇ  
ꢈ ꢃꢉꢂꢊꢋꢌ ꢍꢎꢋ ꢉꢏꢂ ꢐꢎ ꢃ ꢑꢒ ꢓ ꢑꢏ  
ꢔ ꢒꢉ ꢕꢋ ꢖ ꢗꢎꢉꢂꢉ ꢑꢋ ꢈꢍ ꢉꢘ ꢍꢉ ꢎ  
SCAS062A − JULY 1987 − REVISED APRIL 1993  
DW OR NT PACKAGE  
(TOP VIEW)  
Flow-Through Architecture Optimizes PCB  
Layout  
Center-Pin V  
and GND Configurations  
Minimize High-Speed Switching Noise  
CC  
A1  
A2  
A3  
OEAB  
1
2
3
4
5
6
7
8
9
24  
23 B1  
22 B2  
21 B3  
20 B4  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
A4  
500-mA Typical Latch-Up Immunity at  
125°C  
Package Options Include Plastic  
Small-Outline Packages, and Standard  
Plastic 300-mil DIPs  
GND  
GND  
GND  
GND  
A5  
19  
18  
V
V
CC  
CC  
17 B5  
16 B6  
15 B7  
14 B8  
13 OEBA  
A6 10  
A7 11  
A8 12  
description  
This octal bus transceiver is designed for  
asynchronous communication between data  
buses. The control function implementation allows  
for maximum flexibility in timing.  
These devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the  
level at the output-enable (OEAB or OEBA) inputs. The output-enable inputs can be used to disable the device  
so that the buses are effectively isolated.  
The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of  
OEAB and OEBA. Each output reinforces its input in this transceiver configuration. Thus, when both control  
inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of  
bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be  
complementary for the 74AC11620.  
The 74AC11620 is characterized for operation from 40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OPERATION  
OEBA  
OEAB  
L
H
H
L
H
L
B data to A bus  
A data to B bus  
Isolation  
B data to A bus,  
A data to B bus  
L
H
EPIC is a trademark of Texas Instruments Incorporated.  
ꢉꢥ  
Copyright 1993, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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