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SN74AC11IPWREP PDF预览

SN74AC11IPWREP

更新时间: 2024-11-05 12:21:47
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
10页 494K
描述
TRIPLE 3-INPUT POSITIVE-AND GATE

SN74AC11IPWREP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.26系列:AC
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:AND GATE最大I(ol):0.024 A
湿度敏感等级:1功能数量:3
输入次数:3端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:2/6 V
最大电源电流(ICC):0.02 mAProp。Delay @ Nom-Sup:10 ns
传播延迟(tpd):10 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

SN74AC11IPWREP 数据手册

 浏览型号SN74AC11IPWREP的Datasheet PDF文件第2页浏览型号SN74AC11IPWREP的Datasheet PDF文件第3页浏览型号SN74AC11IPWREP的Datasheet PDF文件第4页浏览型号SN74AC11IPWREP的Datasheet PDF文件第5页浏览型号SN74AC11IPWREP的Datasheet PDF文件第6页浏览型号SN74AC11IPWREP的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢆꢇ ꢈ ꢉ  
ꢊ ꢋꢌꢉ ꢍꢈ ꢎ ꢇꢌꢁ ꢉꢏꢊ ꢉꢐ ꢀꢌ ꢊ ꢌꢑꢈ ꢇꢄ ꢁꢒ ꢓ ꢄꢊꢈ  
SCLS557 − JANUARY 2004  
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
D
2-V to 6-V V  
Operation  
CC  
Inputs Accept Voltages to 6 V  
Max t of 7.5 ns at 5 V  
pd  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D OR PW PACKAGE  
(TOP VIEW)  
D
Enhanced Product-Change Notification  
D
Qualification Pedigree  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
2A  
2B  
2C  
V
CC  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
1C  
1Y  
3A  
3B  
3C  
3Y  
2Y  
GND  
8
description/ordering information  
The SN74AC11 device contains three independent 3-input AND gates. This device performs the Boolean  
function Y = A B C or Y = A + B + C in positive logic.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
§
SOIC − D  
Tape and reel  
Tape and reel  
SN74AC11IDREP  
SAC11EP  
SAC11EP  
−40°C to 85°C  
TSSOP − PW  
SN74AC11IPWREP  
§
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Product Preview  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
C
H
X
X
L
H
L
L
L
X
X
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢊꢟ  
Copyright 2004, Texas Instruments Incorporated  
ꢛ ꢟ ꢜ ꢛꢔ ꢕꢩ ꢗꢖ ꢚ ꢢꢢ ꢠꢚ ꢘ ꢚ ꢙ ꢟ ꢛ ꢟ ꢘ ꢜ ꢤ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74AC11IPWREP 替代型号

型号 品牌 替代类型 描述 数据表
V62/04701-01XE TI

完全替代

TRIPLE 3-INPUT POSITIVE-AND GATE
SN74AC11IPWRQ1 TI

完全替代

TRIPLE 3-INPUT POSITIVE-AND GATE
SN74AC11PWLE TI

完全替代

TRIPLE 3-INPUT POSITIVE-AND GATES

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