5秒后页面跳转
捷配首页

Datasheet > 暂无类别数据> SN74ABT652DW
SN74ABT652DW PDF预览

SN74ABT652DW

更新时间： 2024-11-11 23:06:11
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件输入元件信息通信管理
页数 文件大小 规格书
11页 177K
描述
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74ABT652DW 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP24,.4
针数：24Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：8.02
Is Samacsys：N其他特性：SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED/REAL TIME DATA
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：ABTJESD-30 代码：R-PDSO-G24
JESD-609代码：e4长度：15.4 mm
负载电容（CL）：50 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.064 A湿度敏感等级：1
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP24,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：5 V最大电源电流（ICC）：30 mA
Prop。Delay @ Nom-Sup：8.4 ns传播延迟（tpd）：8.4 ns
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：7.5 mmBase Number Matches：1

SN74ABT652DW 数据手册

 浏览型号SN74ABT652DW的Datasheet PDF文件第2页浏览型号SN74ABT652DW的Datasheet PDF文件第3页浏览型号SN74ABT652DW的Datasheet PDF文件第4页浏览型号SN74ABT652DW的Datasheet PDF文件第5页浏览型号SN74ABT652DW的Datasheet PDF文件第6页浏览型号SN74ABT652DW的Datasheet PDF文件第7页 
SN54ABT652, SN74ABT652  
OCTAL BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCBS070D – JULY 1991 – REVISED JULY 1994  
SN54ABT652 . . . JT PACKAGE  
SN74ABT652 . . . DB, DW, OR NT PACKAGE  
(TOP VIEW)  
• State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
• ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CLKAB  
SAB  
OEAB  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
V
CC  
2
CLKBA  
SBA  
OEBA  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
3
• Latch-Up Performance Exceeds 500 mA  
4
Per JEDEC Standard JESD-17  
5
6
• Typical V  
(Output Ground Bounce)  
OLP  
CC  
7
< 1 V at V  
= 5 V, T = 25°C  
A
8
• High-Drive Outputs (–32-mA I  
,
OH  
9
64-mA I  
)
OL  
10  
11  
12  
• Package Options Include Plastic  
Small-Outline ((DW)) and Shrink  
B8  
Small-Outline (DB) Packages, Ceramic  
Chip Carriers (FK), and Plastic (NT) and  
Ceramic (JT) DIPs  
SN54ABT652 . . . FK PACKAGE  
(TOP VIEW)  
description  
These devices consist of bus transceiver circuits,  
D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the  
data bus or from the internal storage registers.  
4
3
2 1 28 27 26  
5
25  
24  
23  
22  
21  
20  
19  
A1  
A2  
A3  
NC  
A4  
A5  
A6  
OEBA  
B1  
B2  
NC  
B3  
B4  
6
Output-enable (OEAB and OEBA) inputs are  
provided to control the transceiver functions.  
Select-control (SAB and SBA) inputs are provided  
to select whether real-time or stored data is  
transferred. The circuitry used for select control  
eliminates the typical decoding glitch that occurs  
in a multiplexer during the transition between  
stored and real-time data. A low input selects  
real-time data, and a high input selects stored  
data. Figure 1 illustrates the four fundamental  
bus-managementfunctionsthatcanbeperformed  
with the ′ABT652.  
7
8
9
10  
11  
B5  
12 13 14 15 16 17 18  
NC – No internal connection  
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at  
the appropriate clock (CLKAB or CLKBA) inputs regardless of the select- or enable-control pins. When SAB and  
SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by  
simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other  
data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.  
To ensure the high-impedance state during power up or power down, OEBA should be tied to V  
through a  
CC  
pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver  
(B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is  
determined by the current-sourcing capability of the driver (A to B).  
The SN74ABT652 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1994, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
2–1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

下载PDF

SN74ABT652DW 替代型号

型号 品牌 替代类型 描述 数据表
SN74ABT652DBR TI

完全替代

 ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SSOP-24
SN74ABT652ADW TI

类似代替

 OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

与SN74ABT652DW相关器件

型号 品牌 获取价格 描述 数据表
SN74ABT652DWG4 TI

获取价格

 		ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24
SN74ABT652DWR TI

获取价格

 		ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24
SN74ABT652DWRG4 TI

获取价格

 		ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24
SN74ABT652NT TI

获取价格

 		OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74ABT657 TI

获取价格

 		OCTAL TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS
SN74ABT657A TI

获取价格

 		OCTAL TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS
SN74ABT657ADBR TI

获取价格

 		具有奇偶校验发生器/校验器和三态输出的八路收发器 | DB | 24 | -40 to 8
SN74ABT657ADW TI

获取价格

 		OCTAL TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS
SN74ABT657ADWR TI

获取价格

 		Octal Transceivers With Parity Generators/Checkers And 3-State Outputs 24-SOIC -40 to 85
SN74ABT657ADWRE4 TI

获取价格

 		Octal Transceivers With Parity Generators/Checkers And 3-State Outputs 24-SOIC -40 to 85

与SN74ABT652DW相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证