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SN74ABT652DWRG4

更新时间： 2024-09-24 20:51:07
品牌 Logo 应用领域
德州仪器 - TI 输入元件信息通信管理光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
13页 497K
描述
ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24

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SN74ABT652DWRG4 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP24,.4针数：24
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.44其他特性：SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED/REAL TIME DATA
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：ABTJESD-30 代码：R-PDSO-G24
JESD-609代码：e4长度：15.4 mm
负载电容（CL）：50 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.064 A湿度敏感等级：1
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP24,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：5 V
最大电源电流（ICC）：30 mAProp。Delay @ Nom-Sup：8.4 ns
传播延迟（tpd）：8.4 ns认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：BICMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
触发器类型：POSITIVE EDGE宽度：7.5 mm
Base Number Matches：1

SN74ABT652DWRG4 数据手册

 浏览型号SN74ABT652DWRG4的Datasheet PDF文件第2页浏览型号SN74ABT652DWRG4的Datasheet PDF文件第3页浏览型号SN74ABT652DWRG4的Datasheet PDF文件第4页浏览型号SN74ABT652DWRG4的Datasheet PDF文件第5页浏览型号SN74ABT652DWRG4的Datasheet PDF文件第6页浏览型号SN74ABT652DWRG4的Datasheet PDF文件第7页 
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SCBS070D − JULY 1991 − REVISED JULY 1994  
SN54ABT652 . . . JT PACKAGE  
SN74ABT652 . . . DB, DW, OR NT PACKAGE  
(TOP VIEW)  
• State-of-the-Art EPIC-ΙΙBBiCMOS Design  
Significantly Reduces Power Dissipation  
• ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CLKAB  
SAB  
OEAB  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
V
CC  
2
CLKBA  
SBA  
OEBA  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
3
• Latch-Up Performance Exceeds 500 mA  
4
Per JEDEC Standard JESD-17  
5
6
• Typical V  
(Output Ground Bounce)  
OLP  
CC  
7
< 1 V at V  
= 5 V, T = 25°C  
A
8
• High-Drive Outputs (−32-mA I  
,
OH  
9
64-mA I  
)
OL  
10  
11  
12  
• Package Options Include Plastic  
Small-Outline ((DW)) and Shrink  
B8  
Small-Outline (DB) Packages, Ceramic  
Chip Carriers (FK), and Plastic (NT) and  
Ceramic (JT) DIPs  
SN54ABT652 . . . FK PACKAGE  
(TOP VIEW)  
description  
These devices consist of bus transceiver circuits,  
D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the  
data bus or from the internal storage registers.  
4
3
2 1 28 27 26  
5
25  
24  
23  
22  
21  
20  
19  
A1  
A2  
A3  
NC  
A4  
A5  
A6  
OEBA  
B1  
B2  
NC  
B3  
B4  
6
Output-enable (OEAB and OEBA) inputs are  
provided to control the transceiver functions.  
Select-control (SAB and SBA) inputs are provided  
to select whether real-time or stored data is  
transferred. The circuitry used for select control  
eliminates the typical decoding glitch that occurs  
in a multiplexer during the transition between  
stored and real-time data. A low input selects  
real-time data, and a high input selects stored  
data. Figure 1 illustrates the four fundamental  
bus-management functions that can be performed  
with the ′ABT652.  
7
8
9
10  
11  
B5  
12 13 14 15 16 17 18  
NC − No internal connection  
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at  
the appropriate clock (CLKAB or CLKBA) inputs regardless of the select- or enable-control pins. When SAB and  
SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by  
simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other  
data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.  
To ensure the high-impedance state during power up or power down, OEBA should be tied to V  
through a  
CC  
pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver  
(B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is  
determined by the current-sourcing capability of the driver (A to B).  
The SN74ABT652 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1994, Texas Instruments Incorporated  
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2−1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234567...13

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