5秒后页面跳转
SN65LV1023A_07 PDF预览

SN65LV1023A_07

更新时间: 2024-11-18 04:51:15
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
29页 718K
描述
10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

SN65LV1023A_07 数据手册

 浏览型号SN65LV1023A_07的Datasheet PDF文件第2页浏览型号SN65LV1023A_07的Datasheet PDF文件第3页浏览型号SN65LV1023A_07的Datasheet PDF文件第4页浏览型号SN65LV1023A_07的Datasheet PDF文件第5页浏览型号SN65LV1023A_07的Datasheet PDF文件第6页浏览型号SN65LV1023A_07的Datasheet PDF文件第7页 
SN65LV1023A  
SN65LV1224B  
www.ti.com  
SLLS621CSEPTEMBER 2004REVISED FEBRUARY 2006  
10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER  
FEATURES  
Lock Indicator  
100-Mbps to 660-Mbps Serial LVDS Data  
Payload Bandwidth at 10-MHz to 66-MHz  
System Clock  
No External Components Required for PLL  
28-Pin SSOP and Space Saving 5 × 5 mm QFN  
Packages Available  
Pin-Compatible Superset of  
DS92LV1023/DS92LV1224  
Industrial Temperature Qualified, TA = –40°C  
to 85°C  
Chipset (Serializer/Deserializer) Power  
Consumption <450 mW (Typ) at 66 MHz  
Programmable Edge Trigger on Clock  
Flow-Through Pinout for Easy PCB Layout  
Synchronization Mode for Faster Lock  
DESCRIPTION  
The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to  
transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz  
to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload  
encoded throughput.  
Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC  
patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode,  
the deserializer establishes lock within specified, shorter time parameters.  
The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is  
available to place the output pins in the high-impedance state without losing PLL lock.  
The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of –40°C to  
85°C.  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
SYNC1  
SYNC2  
DV  
DV  
AV  
AGND  
PWRDN  
AGND  
CC  
CC  
CC  
2
3
D
IN0  
D
IN1  
D
IN2  
D
IN3  
D
IN4  
D
IN5  
D
IN6  
D
IN7  
D
IN8  
D
IN9  
32 31 30 29 28 27 26 25  
4
D
D
1
24  
23  
22  
21  
20  
19  
18  
17  
AGND  
IN1  
5
2
3
4
5
6
7
8
2
PWRDN  
AGND  
6
IN  
IN  
DB Package  
SN65LV1023A  
Serializer  
7
D +  
D
3
O
RHB Package  
SN65LV1023A  
Serializer  
8
D −  
O
D
IN4  
D
IN5  
D
IN6  
D
IN7  
D
IN8  
D
O+  
D
O−  
9
AGND  
DEN  
AGND  
10  
11  
12  
13  
14  
(Top View)  
AGND  
DEN  
AV  
CC  
TCLK_R/F  
TCLK  
DGND  
DGND  
AGND  
9
10 11 12 13 14 15 16  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

与SN65LV1023A_07相关器件

型号 品牌 获取价格 描述 数据表
SN65LV1023ADB TI

获取价格

10-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023ADBG4 TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023ADBR TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023ADBRG4 TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023A-EP TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023AMDBREP TI

获取价格

增强型产品 100Mbps 至 660Mbps、10:1 LVDS 串行器/解串器变送器
SN65LV1023ARHBR TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023ARHBRG4 TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023ARHBT TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023DB TI

获取价格

30 MHZ TO 66MHZ 10:1 LVDS SERIALIZER/DESERIALIZER