SN65ELT20
www.ti.com ............................................................................................................................................................................................ SLLS922–DECEMBER 2008
5-V TTL-to-Differential PECL Translator
1
FEATURES
PINOUT ASSIGNMENT
•
1.25-ns Maximum Propagation Delay
•
Operating Range: VCC = 4.2 V to 5.7 V With
GND = 0 V
D-8, DGK-8 Package
(Top View)
•
•
•
Flow-Through Pinout Enables Easy Layout
Built-In Temperature Compensation
VCC
NC
Q
1
2
8
7
Drop-In Compatible With MC10ELT20,
MC100ELT20
TTL
D
APPLICATIONS
•
Data and Clock Transmission Over Backplane
PECL
•
Signaling Level Conversion for Clock or Data
3
4
6
5
NC
Q
DESCRIPTION
The SN65ELT20 is
a
TTL-to-differential PECL
translator. It operates on a 5-V supply and ground
only. The output is undetermined when the inputs are
left floating. The low output skew makes the device
an ideal solution for clock or data signal translation.
NC
GND
P0065-04
The SN65ELT20 is housed in an industry-standard
SOIC-8 package and is also available in a TSSOP-8
package.
Table 1. Pin Description
PIN
FUNCTION
TTL input
D
Q,Q
VCC
PECL outputs
Positive supply
Ground
GND
ORDERING INFORMATION(1)
PART NUMBER
SN65ELT206D
SN65ELT20DGK
PART MARKING
PACKAGE
LEAD FINISH
NiPdAu
SN65ELT20
SN65ELT20
SOIC
SOIC-TSSOP
NiPdAu
(1) Leaded device options not initially available; contact a sales representative for further details.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.