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SN65ELT23DGK PDF预览

SN65ELT23DGK

更新时间: 2024-01-25 16:19:15
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动器转换器逻辑集成电路光电二极管PC
页数 文件大小 规格书
11页 436K
描述
5-V Dual Differential PECL Buffer-to-TTL Translator

SN65ELT23DGK 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:MSOP
包装说明:VSSOP-8针数:8
Reach Compliance Code:compliantECCN代码:5A991.B.1
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.24Samacsys Confidence:
Samacsys Status:ReleasedSamacsys PartID:606728
Samacsys Pin Count:8Samacsys Part Category:Integrated Circuit
Samacsys Package Category:OtherSamacsys Footprint Name:SOP65P490X110-8N
Samacsys Released Date:2017-01-12 12:59:53Is Samacsys:N
系列:65ELT输入调节:STANDARD
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:3 mm负载电容(CL):20 pF
逻辑集成电路类型:LOW SKEW CLOCK DRIVER最大I(ol):0.024 A
湿度敏感等级:1功能数量:2
反相输出次数:端子数量:8
实输出次数:2最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TUBE
峰值回流温度(摄氏度):260Prop。Delay @ Nom-Sup:5 ns
传播延迟(tpd):5 ns认证状态:Not Qualified
座面最大高度:1.07 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3 mm
Base Number Matches:1

SN65ELT23DGK 数据手册

 浏览型号SN65ELT23DGK的Datasheet PDF文件第2页浏览型号SN65ELT23DGK的Datasheet PDF文件第3页浏览型号SN65ELT23DGK的Datasheet PDF文件第4页浏览型号SN65ELT23DGK的Datasheet PDF文件第5页浏览型号SN65ELT23DGK的Datasheet PDF文件第6页浏览型号SN65ELT23DGK的Datasheet PDF文件第7页 
SN65ELT23  
www.ti.com ....................................................................................................................................................................................................... SLLS925JUNE 2009  
5-V Dual Differential PECL Buffer-to-TTL Translator  
1
FEATURES  
PIN ASSIGNMENT  
Dual 5-V Differential PECL-to-TTL Buffer  
24-mA TTL Ouputs  
D or DGK PACKAGE  
(TOP VIEW)  
Operating Range  
PECL VCC = 4.75 V to 5.25 V with  
GND = 0 V  
V
D
D
1
2
8
7
CC  
0
0
Support for Clock Frequencies of 250 MHz  
(TYP)  
Q
0
1
3.5-ns Typical Propagation Delay  
PECL  
TTL  
Output Default Low with Inputs Left Open or  
<1.3 V  
3
4
6
5
D
D
Q
1
Internal Input 50-kPull-Down Resistor  
Built-In Temperature Compensation  
Drop-In Compatible to the MC100ELT23  
GND  
1
Table 1. Pin Descriptions  
APPLICATIONS  
PIN  
FUNCTION  
PECL inputs  
Data and Clock Transmission Over Backplane  
D0, D0, D1, D1  
Q0, Q1  
Signaling Level Conversion for Clock or Data  
TTL outputs  
VCC  
Positive supply  
Ground  
DESCRIPTION  
GND  
The SN65ELT23 is a low power dual PECL-to-TTL  
translator device. The device includes circuitry to  
maintain a known logic low level when inputs are in  
an open condition. The SN65ELT23 is housed in an  
industry standard SOIC-8 package and is also  
available in an optional TSSOP-8 package.  
ORDERING INFORMATION(1)(2)  
PART NUMBER  
SN65ELT23D  
PART MARKING  
ELT23  
SIKI  
PACKAGE  
SOIC  
MSOP  
LEAD FINISH  
NiPdAu  
NiPdAu  
SN65ELT23DGK  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Leaded device options are not initially available; contact a sales representative for further details.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2009, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN65ELT23DGK 替代型号

型号 品牌 替代类型 描述 数据表
SN65ELT23DGKR TI

完全替代

5-V Dual Differential PECL Buffer-to-TTL Translator

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