Datasheet > SN54LS222A

SN54LS222A

更新时间： 2024-09-15 12:22:35

品牌	Logo	应用领域
德州仪器 - TI		存储输出元件
页数	文件大小	规格书
12页	252K
描述
16 Ã 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SN54LS222A 数据手册

SN54LS222A

16 × 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

WITH 3-STATE OUTPUTS

SDLS959A – DECEMBER 2001 – REVISED APRIL 2003

J PACKAGE

(TOP VIEW)

Independent Synchronous Inputs and

Outputs

16 Words by 4 Bits Each

IRE

LDCK

3-State Outputs Drive Bus Lines Directly

Data Rates up to 10 MHz

UNCK

ORE

CLR

Fall-Through Time 50 ns Typical

Data Terminals Arranged for Printed Circuit

Board Layout

Expandable, Using External Gating

Packaged in Standard Ceramic (J) 300-mil

DIPs

GND

NC – No internal connection

description

The SN54LS222A 64-bit, low-power Schottky memory is organized as 16 words by 4 bits each. It can be

expanded in multiples of 15m + 1 words or 4n bits, or both (where n is the number of packages in the vertical

array, and m is the number of packages in the horizontal array); however, some external gating is required. For

longer words, the input-ready (IR) signals of the first-rank packages and output-ready (OR) signals of the

last-rank packages must be ANDed for proper synchronization.

A first-in, first-out (FIFO) memory is a storage device that allows data to be written to and read from its array

at independent data rates. These FIFOs are designed to process data at rates up to 10 MHz in a bit-parallel

format, word by word.

The load clock (LDCK) normally is held low, and data is written into memory on the high-to-low transition of

LDCK. The unload clock (UNCK) normally is held high, and data is read out on the low-to-high transition of

UNCK. The memory is full when the number of words clocked in exceeds by 16 the number of words clocked

out. When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory

is empty, UNCK signals have no effect.

Status of the FIFO memory is monitored by the IR and OR flags that indicate not-full and not-empty conditions.

IR is high only when the memory is not full and LDCK is low. OR is high only when the memory is not empty

and UNCK is high.

A low level on the clear (CLR) input resets the internal stack-control pointers and also sets IR high and OR low

to indicate that old data remaining at the data outputs is invalid. Data outputs are noninverting with respect to

the data inputs and are at high impedance when the output-enable (OE) input is low. OE does not affect the IR

and OR outputs.

The SN54LS222A is characterized over the full military temperature range of –55°C to 125°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

unless otherwise noted. On all other products, production

testing of all parameters.

processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...12

中文翻译

下载PDF

与SN54LS222A相关器件

型号	品牌	获取价格	描述	数据表
SN54LS222AJ	TI	获取价格	16 Ã 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN54LS224A	TI	获取价格	16 Ã 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN54LS224AJ	TI	获取价格	16 Ã 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN54LS224J	TI	获取价格	16X4 OTHER FIFO, CDIP16
SN54LS227W	TI	获取价格	IC,FIFO,16X4,ASYNCHRONOUS,LS-TTL,FP,20PIN,CERAMIC
SN54LS228J	TI	获取价格	16X4 OTHER FIFO, 80ns, CDIP16
SN54LS22FK	ROCHESTER	获取价格	LS SERIES, DUAL 4-INPUT NAND GATE, CQCC20, CERAMIC, LCC-20
SN54LS22J	MOTOROLA	获取价格	DUAL 4-INPUT NAND GATE
SN54LS22J	ROCHESTER	获取价格	LS SERIES, DUAL 4-INPUT NAND GATE, CDIP14, CERAMIC, DIP-14
SN54LS22J	TI	获取价格	LS SERIES, DUAL 4-INPUT NAND GATE, CDIP14, CERAMIC, DIP-14

与SN54LS222A相关文章

摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

6
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

6
SL74HC10N：高性能三输入与非门解析
2024-09-03

84
AIC1781A 电池充电控制器深度解析
2024-09-03

78

产品中心

服务支持

精选活动

关于我们

帮助中心

SN54LS222A

SN54LS222A 数据手册

与SN54LS222A相关器件

与SN54LS222A相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN54LS222A

SN54LS222A 数据手册

与SN54LS222A相关器件

与SN54LS222A相关文章

您还可以找

您在本页遇到什么问题？