ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇꢈ ꢀꢁ ꢉꢃ ꢄꢅ ꢆꢇ
ꢊ ꢋꢌꢍꢎ ꢋꢏꢐ ꢑ ꢒ ꢓꢔꢁ ꢏꢋꢕ ꢏꢖ ꢀꢔ ꢕ ꢔꢗꢑ ꢓꢁꢌꢁ ꢍ ꢘ ꢌꢕꢑ ꢀ
ꢙ ꢔꢕ ꢄ ꢖ ꢏꢑꢁ ꢓꢍꢎꢌꢔ ꢁ ꢖ ꢋꢕ ꢏ ꢋꢕꢀ
SCLS077E − MARCH 1984 − REVISED NOVEMBER 2003
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
D
D
D
Typical t = 8 ns
pd
4-mA Output Drive at 5 V
Low Power Consumption, 20-µA Max I
Low Input Current of 1 µA Max
CC
SN54HC03 . . . J OR W PACKAGE
SN74HC03 . . . D, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54HC03 . . . FK PACKAGE
(TOP VIEW)
1A
1B
V
CC
13 4B
1
2
3
4
5
6
7
14
3
2
1
20 19
18
4A
NC
4Y
1Y
NC
2A
4
5
6
7
8
12
11
10
9
1Y
4A
4Y
3B
3A
3Y
17
16
2A
2B
15 NC
14
9 10 11 12 13
NC
2B
2Y
3B
8
GND
NC − No internal connection
description/ordering information
The ’HC03 devices contain four independent 2-input NAND gates. They perform the Boolean function
Y = A • B or Y = A + B in positive logic. The open-drain outputs require pullup resistors to perform correctly. They
may be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND
functions.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube of 25
Tube of 50
Reel of 2500
Reel of 250
Reel of 2000
Tube of 90
Reel of 2000
Tube of 25
Tube of 150
Tube of 55
SN74HC03N
SN74HC03N
SN74HC03D
SN74HC03DR
SN74HC03DT
SN74HC03NSR
SN74HC03PW
SN74HC03PWR
SNJ54HC03J
SNJ54HC03W
SNJ54HC03FK
HC03
−40°C to 85°C
SOP − NS
HC03
HC03
TSSOP − PW
CDIP − J
CFP − W
LCCC − FK
SNJ54HC03J
SNJ54HC03W
SNJ54HC03FK
−55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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