Datasheet > SN54AS866_08

SN54AS866_08

更新时间： 2024-11-16 02:58:23

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
7页	118K
描述
8-BIT MAGNITUDE COMPARATORS

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SN54AS866_08 数据手册

SN54AS866, SN74AS866A

8-BIT MAGNITUDE COMPARATORS

SDAS183A – DECEMBER 1982 – REVISED JUNE 1990

SN54AS866 . . . JD PACKAGE

SN74AS866A . . . N PACKAGE

(TOP VIEW)

• Package Options Include Plastic Small

Outline Packages, Both Plastic and Ceramic

Chip Carriers, and Standard Plastic and

Ceramic DIPs

QLE

L/A

• Input and Output Latches with Active-High

CLRQ

PLE

Enables

p < Qin

P > Qin

• Fast Compare to Zero

• Arithmetic and Logical Comparison

• Open-Collector P = Q Output

23 P5

description

These Advanced Schottky devices are capable of

performing high-speed arithmetic or logical

comparisons on two 8-bit binary or two’s

complement words. Three fully decoded

decisions about words P and Q are externally

available at the outputs. These devices are fully

expandable to any word length by connecting the

totem pole P>Q and P<Q outputs of each stage to

the P>Q and P<Q inputs of the next higher-order

stage. The cascading paths are implemented with

only a two-gate-level delay to reduce overall

comparison times for long words. The open-

collector P=Q output may be wire-ANDed

together.

P < Qout

P > Qout

OLE

P = Qout

GND

SN54AS866 . . . FK PACKAGE

SN74AS866A . . . FN PACKAGE

(TOP VIEW)

2 1 28 27 26

25 P7

Both input words P and Q plus all three outputs

(P>Q, P<Q, and P = Q) are equipped with latches

to provide the designer with temporary data

storage for avoiding race conditions. The enable

circuitry is implemented with minimal delay times

to enhance performance when the devices are

cascaded for longer word lengths. Each latch is

transparent when the appropriate latch enable,

PLE, QLE, or OLE is high.

12 13 14 15 16 17 18

The enable inputs PLE and QLE and data inputs

P and Q utilize pnp input transistors to reduce the

low-level input current requirement to typically

–0.25 mA, which minimizes loading effects.

The Q register may be cleared to zero for a fast comparison of the P word to zero.

The SN54AS866 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74AS866A is characterized for operation from 0°C to 70°C.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7

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与SN54AS866_08相关器件

型号	品牌	获取价格	描述	数据表
SN54AS866FH-00	TI	获取价格	AS SERIES, 8-BIT MAGNITUDE COMPARATOR, TRUE OUTPUT, CQCC28
SN54AS866FK	ROCHESTER	获取价格	Magnitude Comparator, AS Series, 8-Bit, True Output, TTL, CQCC28, CERAMIC, LCC-28
SN54AS866FK	TI	获取价格	AS SERIES, 8-BIT MAGNITUDE COMPARATOR, TRUE OUTPUT, CQCC28, CERAMIC, LCC-28
SN54AS866JD	TI	获取价格	AS SERIES, 8-BIT MAGNITUDE COMPARATOR, TRUE OUTPUT, CDIP28, CERAMIC, DIP-28
SN54AS866JD	ROCHESTER	获取价格	Magnitude Comparator, AS Series, 8-Bit, True Output, TTL, CDIP28, CERAMIC, DIP-28
SN54AS867	TI	获取价格	SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SN54AS867_06	TI	获取价格	SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SN54AS867_07	TI	获取价格	SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SN54AS867FH-00	TI	获取价格	AS SERIES, SYN POSITIVE EDGE TRIGGERED 8-BIT BIDIRECTIONAL BINARY COUNTER, CQCC28
SN54AS867FK	TI	获取价格	SYNCHRONOUS 8-BIT UP/DOWN COUNTERS

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