Datasheet > SN54AC10_15

SN54AC10_15

更新时间： 2024-11-06 02:58:19

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
5页	84K
描述
TRIPLE 3-INPUT POSITIVE-NAND GATES

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SN54AC10_15 数据手册

SN54AC10, SN74AC10

TRIPLE 3-INPUT POSITIVE-NAND GATES

SCAS529B – AUGUST 1995 – REVISED SEPTEMBER 1996

SN54AC10 . . . J OR W PACKAGE

SN74AC10 . . . D, DB, N, OR PW PACKAGE

(TOP VIEW)

EPIC (Enhanced-Performance Implanted

CMOS) 1-µm Process

Package Options Include Plastic

Small-Outline (D), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK) and

Flatpacks (W), and Standard Plastic (N) and

Ceramic (J) DIPS

GND

description

The ’AC10 contain three independent 3-input

NAND gates. The devices perform the Boolean

function Y = A • B • C or Y = A + B + C in positive

logic.

SN54AC10 . . . FK PACKAGE

(TOP VIEW)

The SN54AC10 is characterized for operation

over the full military temperature range of –55°C

to 125°C. The SN74AC10 is characterized for

operation from –40°C to 85°C.

20 19

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

9 10 11 12 13

NC – No internal connection

†

logic symbol

logic diagram, each gate (positive logic)

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

Pin numbers shown are for the D, DB, J, N, PW, and W packages.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5

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