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SN54AC11W PDF预览

SN54AC11W

更新时间: 2024-11-17 22:59:11
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
15页 519K
描述
TRIPLE 3-INPUT POSITIVE-AND GATES

SN54AC11W 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.13系列:AC
JESD-30 代码:R-GDFP-F14长度:9.21 mm
负载电容(CL):50 pF逻辑集成电路类型:AND GATE
功能数量:3输入次数:3
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK传播延迟(tpd):8 ns
认证状态:Not Qualified座面最大高度:2.03 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL宽度:6.29 mm
Base Number Matches:1

SN54AC11W 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢆ ꢇ ꢀ ꢁꢈ ꢃꢄ ꢅꢆꢆ  
ꢉ ꢊꢋꢌ ꢍꢎ ꢏ ꢐꢋꢁ ꢌꢑꢉ ꢌꢒ ꢀꢋ ꢉ ꢋꢓꢎ ꢐꢄꢁ ꢔ ꢕ ꢄꢉꢎ ꢀ  
SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003  
D
D
2-V to 6-V V  
Operation  
D
Max t of 7.5 ns at 5 V  
pd  
CC  
Inputs Accept Voltages to 6 V  
SN54AC11 . . . J OR W PACKAGE  
SN74AC11 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54AC11 . . . FK PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
2A  
2B  
2C  
V
CC  
3
2
1
20 19  
18  
1C  
1Y  
3A  
3B  
3C  
3Y  
1Y  
NC  
3A  
NC  
3B  
2A  
NC  
2B  
4
5
6
7
8
17  
16  
15  
14  
NC  
2C  
2Y  
GND  
8
9 10 11 12 13  
NC − No internal connection  
description/ordering information  
The ’AC11 devices contain three independent 3-input AND gates. These devices perform the Boolean function  
Y = A B C or Y = A + B + C in positive logic.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube  
SN74AC11N  
SN74AC11N  
Tube  
SN74AC11D  
AC11  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74AC11DR  
SN74AC11NSR  
SN74AC11DBR  
SN74AC11PW  
SN74AC11PWR  
SNJ54AC11J  
SNJ54AC11W  
SNJ54AC11FK  
SOP − NS  
AC11  
AC11  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
AC11  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54AC11J  
SNJ54AC11W  
SNJ54AC11FK  
Tube  
−55°C to 125°C  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
C
H
X
X
L
H
L
L
L
X
X
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢒ ꢗ ꢢ ꢚ ꢙꢥ ꢠꢟ ꢝꢞ ꢟꢙ ꢛꢢ ꢤꢖ ꢜꢗ ꢝ ꢝꢙ ꢬꢋ ꢍꢐ ꢌꢊ ꢭ ꢐꢏꢮꢂ ꢏꢂꢇ ꢜꢤꢤ ꢢꢜ ꢚ ꢜ ꢛꢡ ꢝꢡꢚ ꢞ ꢜ ꢚ ꢡ ꢝꢡ ꢞꢝꢡ ꢥ  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
ꢠ ꢗꢤ ꢡꢞꢞ ꢙ ꢝꢧꢡ ꢚ ꢩꢖ ꢞꢡ ꢗ ꢙꢝꢡ ꢥꢦ ꢒ ꢗ ꢜꢤ ꢤ ꢙ ꢝꢧꢡ ꢚ ꢢꢚ ꢙ ꢥꢠꢟ ꢝꢞ ꢇ ꢢꢚ ꢙ ꢥꢠꢟ ꢝꢖꢙ ꢗ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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