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SN54AC14J PDF预览

SN54AC14J

更新时间: 2024-11-17 22:38:55
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
5页 83K
描述
HEX SCHMITT-TRIGGER INVERTERS

SN54AC14J 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.17
系列:ACJESD-30 代码:R-GDIP-T14
长度:19.56 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.012 A
功能数量:6输入次数:1
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
Prop。Delay @ Nom-Sup:16 ns传播延迟(tpd):16 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

SN54AC14J 数据手册

 浏览型号SN54AC14J的Datasheet PDF文件第2页浏览型号SN54AC14J的Datasheet PDF文件第3页浏览型号SN54AC14J的Datasheet PDF文件第4页浏览型号SN54AC14J的Datasheet PDF文件第5页 
SN54AC14, SN74AC14  
HEX SCHMITT-TRIGGER INVERTERS  
SCAS522D – AUGUST 1995 – REVISED FEBRUARY 1998  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
SN54AC14 . . . J OR W PACKAGE  
SN74AC14 . . . D, DB, N, OR PW PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK) and  
Flatpacks (W), and Standard Plastic (N) and  
Ceramic (J) DIPS  
1A  
1Y  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
6A  
6Y  
5A  
5Y  
4A  
4Y  
2A  
2Y  
3A  
3Y  
description  
GND  
8
The ’AC14 devices contain six independent  
inverters. The devices perform the Boolean  
function Y = A.  
SN54AC14 . . . FK PACKAGE  
(TOP VIEW)  
The SN54AC14 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74AC14 is characterized for  
operation from –40°C to 85°C.  
3
2
1
20 19  
18  
6Y  
NC  
5A  
NC  
5Y  
2A  
NC  
2Y  
4
5
6
7
8
FUNCTION TABLE  
(each inverter)  
17  
16  
15  
14  
INPUT  
A
OUTPUT  
Y
NC  
3A  
H
L
L
9 10 11 12 13  
H
NC – No internal connection  
logic symbol  
logic diagram, each inverter (positive logic)  
1
2
4
1A  
1Y  
2Y  
A
Y
3
2A  
5
6
8
3A  
3Y  
4Y  
5Y  
9
4A  
10  
11  
5A  
12  
13  
6Y  
6A  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, DB, J, N, PW, or W packages.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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