SN54ABT833FK

更新时间： 2024-11-11 23:06:07

品牌	Logo	应用领域
德州仪器 - TI		总线收发器
页数	文件大小	规格书
9页	156K
描述
8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

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数据手册

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SN54ABT833FK 数据手册

SN54ABT833, SN74ABT833

8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

SCBS195C – FEBRUARY 1991 – REVISED JANUARY 1997

SN54ABT833 . . . JT PACKAGE

SN74ABT833 . . . DW OR NT PACKAGE

(TOP VIEW)

State-of-the-Art EPIC-ΙΙB BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

OEA

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical V

(Output Ground Bounce) < 1 V

OLP

at V

= 5 V, T = 25°C

High-Drive Outputs (–32-mA I

64-mA I

)

Parity Error Flag With Parity

Generator/Checker

ERR 10

CLR

15 PARITY

OEB

CLK

GND

Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Plastic (NT) and

Ceramic (JT) DIPs

SN54ABT833 . . . FK PACKAGE

(TOP VIEW)

description

28 27 26

The ’ABT833 8-bit to 9-bit parity transceivers are

designedforcommunicationbetweendatabuses.

When data is transmitted from the A bus to the

B bus, a parity bit is generated. When data is

transmitted from the B bus to the A bus with its

corresponding parity bit, the open-collector

parity-error (ERR) output indicates whether or not

an error in the B data has occurred. The

output-enable (OEA and OEB) inputs can be used

to disable the device so that the buses are

effectively isolated. The ’ABT833 provide true

data at their outputs.

12 13 14 15 16 17 18

NC – No internal connection

A 9-bit parity generator/checker generates a

parity-odd (PARITY) output and monitors the

parity of the I/O ports with the ERR flag. ERR is

clocked into the register on the rising edge of the

clock(CLK)input. Theerrorflagregisteriscleared

with a low pulse on the clear (CLR) input. When

both OEA and OEB are low, data is transferred

from the A bus to the B bus and inverted parity is

generated. Inverted parity is a forced error

condition that gives the designer more system

diagnostic capability.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...9

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与SN54ABT833FK相关器件

型号	品牌	获取价格	描述	数据表
SN54ABT833JT	TI	获取价格	8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS
SN54ABT8373FK	TI	获取价格	ABT SERIES, 8-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, CQCC28
SN54ABT8373JT	TI	获取价格	ABT SERIES, 8-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, CDIP24
SN54ABT8374FK	TI	获取价格	ABT SERIES, 8-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, CQCC28
SN54ABT8374JT	TI	获取价格	ABT SERIES, 8-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, CDIP24
SN54ABT841	TI	获取价格	10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54ABT841FK	TI	获取价格	10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54ABT841JT	TI	获取价格	10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54ABT841W	TI	获取价格	10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54ABT843	TI	获取价格	9-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS

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