Datasheet > SMUN5212DW

SMUN5212DW

更新时间： 2024-11-21 06:12:51

品牌	Logo	应用领域
SECOS		晶体晶体管
页数	文件大小	规格书
8页	352K
描述
NPN Multi-Chip Built-in Resistors Transistor

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技术参数
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SMUN5212DW 技术参数

生命周期：	Contact Manufacturer	Reach Compliance Code：	compliant
风险等级：	5.61	Base Number Matches：	1

SMUN5212DW 数据手册

SMUN52XXDW

NPN Multi-Chip

Elektronische Bauelemente

Built-in Resistors Transistor

The BRT (Bias Resistor Transistor) contains a single transistor

with a monolithic bias network consisting of two resistors; a series

base resistor and a base–emitter resistor. These digital transistors are

designed to replace a single device and its external resistor bias network.

The BRT eliminates these individual components by integrating them

into a single device. In the SMUN5211DW series, two BRT devices are

housed in the SOT–363 package which is ideal for low power surface

mount applications where board space is at a premium.

• Simplifies Circuit Design

SOT-363

8^o

.055(1.40)

.047(1.20)

.026TYP

(0.65TYP)

.021REF

(0.525)REF

.053(1.35)

.045(1.15)

.096(2.45)

.085(2.15)

• Reduces Board Space

• Reduces Component Count

• Pb-Free Package is available

.018(0.46)

.010(0.26)

.014(0.35)

.006(0.15)

.003(0.08)

MARKING DIAGRAM

.087(2.20)

.079(2.00)

.004(0.10)

.000(0.00)

R₁

R₂

Q₂

.043(1.10)

.035(0.90)

.039(1.00)

.035(0.90)

R₂

Q₁

R₁

Dimensions in inches and (millimeters)

7X = Device Marking

MAXIMUM RATINGS (T A = 25°C unless otherwise noted, common for Q 1 and Q 2 )

Rating

Symbol

V _CBO

V _CEO

I _C

Value

Unit

Vdc

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Vdc

100

mAdc

THERMAL CHARACTERISTICS

Max

Characteristic (One Junction Heated)

Symbol

P _D

Unit

Note 2

Note 1

Total Device Dissipation

Derate above 25°C

T _A= 25°C

187

1.5

256

2.0

mW/°C

Thermal Resistance – Junction-to-Ambient

670

490

°C/W

Max

Characteristic (Both Junctions Heated)

Symbol

Unit

Note 2

Note 1

T _A= 25°C

Total Device Dissipation

Derate above 25°C

P _D

250

2.0

385

3.0

mW/°C

Thermal Resistance – Junction-to-Ambient

Thermal Resistance – Junction-to-Lead

Junction and Storage Temperature

R _θJA

493

188

°C/W

°C

325

208

R _θJL

T _J, T _stg

–55 to +150

1. FR–4 @ Minimum Pad

2. FR–4 @ 1.0 x 1.0 inch Pad

http://www.SeCoSGmbH.com

Any changing of specification will not be informed individual

22-Jun-2007 Rev. A

Page 1 of 8

12 3 4 5 6 7 8

中文翻译

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与SMUN5212DW相关器件

型号	品牌	获取价格	描述	数据表
SMUN5212T1G	ONSEMI	获取价格	Digital Transistors (BRT) R1 = 22 k, R2 = 22 k
SMUN5213DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor
SMUN5213DW1T1G	ONSEMI	获取价格	Dual NPN Bias Resistor Transistors R1 = 47 K , R2 = 47 K
SMUN5213T1G	ONSEMI	获取价格	Digital Transistors (BRT) R1 = 47 k, R2 = 47 k
SMUN5214DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor
SMUN5214DW1T1G	ONSEMI	获取价格	Dual NPN Bias Resistor Transistors
SMUN5214T1G	ONSEMI	获取价格	Digital Transistors (BRT) R1 = 10 k, R2 = 47 k
SMUN5215DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor
SMUN5215T1G	ONSEMI	获取价格	Digital Transistors (BRT) R1 = 10 k, R2 = k
SMUN5216DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor

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