Datasheet > 晶体管 > 小信号双极晶体管> SMUN5230DW1T1G

SMUN5230DW1T1G

更新时间： 2024-11-22 11:01:35

品牌	Logo	应用领域
安森美 - ONSEMI		小信号双极晶体管数字晶体管
页数	文件大小	规格书
21页	140K
描述
双 NPN 双极数字晶体管 (BRT)

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中文翻译

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SMUN5230DW1T1G 数据手册

MUN5211DW1T1 Series

Preferred Devices

Dual Bias Resistor

Transistors

NPN Silicon Surface Mount Transistors

with Monolithic Bias Resistor Network

The BRT (Bias Resistor Transistor) contains a single transistor with

a monolithic bias network consisting of two resistors; a series base

resistor and a base−emitter resistor. These digital transistors are

designed to replace a single device and its external resistor bias

network. The BRT eliminates these individual components by

integrating them into a single device. In the MUN5211DW1T1 series,

two BRT devices are housed in the SOT−363 package which is ideal

for low power surface mount applications where board space is at a

premium.

http://onsemi.com

(3)

(2)

(1)

Features

(4)

(5)

(6)

• Simplifies Circuit Design

• Reduces Board Space

• Reduces Component Count

• Pb−Free Packages are Available

MAXIMUM RATINGS

(T = 25°C unless otherwise noted, common for Q and Q )

SOT−363

CASE 419B

STYLE 1

Rating

Symbol

Value

Unit

Vdc

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

CBO

CEO

Vdc

MARKING DIAGRAM

100

mAdc

THERMAL CHARACTERISTICS

xx M G

Characteristic

(One Junction Heated)

Symbol

Max

Unit

Total Device Dissipation

187 (Note 1)

256 (Note 2)

1.5 (Note 1)

2.0 (Note 2)

T = 25°C

Derate above 25°C

mW/°C

°C/W

= Device Code

= Date Code*

= Pb−Free Package

Thermal Resistance,

Junction-to-Ambient

670 (Note 1)

490 (Note 2)

(Note: Microdot may be in either location)

*Date Code orientation and/or position may

vary depending upon manufacturing location.

Characteristic

(Both Junctions Heated)

Symbol

Max

Unit

Total Device Dissipation

250 (Note 1)

385 (Note 2)

2.0 (Note 1)

3.0 (Note 2)

T = 25°C

DEVICE MARKING INFORMATION

See specific marking information in the device marking table

on page 2 of this data sheet.

Derate above 25°C

mW/°C

°C/W

°C

Thermal Resistance,

Junction-to-Ambient

493 (Note 1)

325 (Note 2)

Preferred devices are recommended choices for future use

and best overall value.

Thermal Resistance,

Junction-to-Lead

188 (Note 1)

208 (Note 2)

Junction and Storage Temperature

T , T

−55 to +150

stg

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

1. FR−4 @ Minimum Pad

2. FR−4 @ 1.0 x 1.0 inch Pad

Semiconductor Components Industries, LLC, 2005

Publication Order Number:

December, 2005 − Rev. 7

MUN5211DW1T1/D

12 3 4 5 6 7...21

中文翻译

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与SMUN5230DW1T1G相关器件

型号	品牌	获取价格	描述	数据表
SMUN5231DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor
SMUN5231DW1T1G	ONSEMI	获取价格	双 NPN 偏置电阻晶体管 (BRT)
SMUN5232DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor
SMUN5232DW1T1G	ONSEMI	获取价格	双 NPN 双极数字晶体管 (BRT)
SMUN5232T1G	ONSEMI	获取价格	Digital Transistors (BRT) R1 = 4.7 k, R2 = 4.7 k
SMUN5233DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor
SMUN5233DW1T1G	ONSEMI	获取价格	双路 PNP 双极数字晶体管 (BRT)
SMUN5233T1G	ONSEMI	获取价格	Digital Transistors (BRT) R1 = 4.7 k, R2 = 47 k
SMUN5234DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor
SMUN5235DW	SECOS	获取价格	NPN Multi-Chip Built-in Resistors Transistor

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