SMUN52XXDW
NPN Multi-Chip
Elektronische Bauelemente
Built-in Resistors Transistor
The BRT (Bias Resistor Transistor) contains a single transistor
with a monolithic bias network consisting of two resistors; a series
base resistor and a base–emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias network.
The BRT eliminates these individual components by integrating them
into a single device. In the SMUN5211DW series, two BRT devices are
housed in the SOT–363 package which is ideal for low power surface
mount applications where board space is at a premium.
• Simplifies Circuit Design
SOT-363
8o
.055(1.40)
.047(1.20)
o
0
.026TYP
(0.65TYP)
.021REF
(0.525)REF
.053(1.35)
.045(1.15)
.096(2.45)
.085(2.15)
• Reduces Board Space
• Reduces Component Count
• Pb-Free Package is available
.018(0.46)
.010(0.26)
.014(0.35)
.006(0.15)
.006(0.15)
.003(0.08)
MARKING DIAGRAM
.087(2.20)
.079(2.00)
6
5
4
.004(0.10)
6
5
4
.000(0.00)
R1
R2
Q2
.043(1.10)
.035(0.90)
.039(1.00)
.035(0.90)
7X
R2
Q1
R1
1
2
3
Dimensions in inches and (millimeters)
1
2
3
7X = Device Marking
MAXIMUM RATINGS (T A = 25°C unless otherwise noted, common for Q 1 and Q 2 )
Rating
Symbol
V CBO
V CEO
I C
Value
50
Unit
Vdc
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
50
Vdc
100
mAdc
THERMAL CHARACTERISTICS
Max
Characteristic (One Junction Heated)
Symbol
P D
Unit
Note 2
Note 1
Total Device Dissipation
Derate above 25°C
mW
T A = 25°C
187
1.5
256
2.0
mW/°C
Thermal Resistance – Junction-to-Ambient
R
670
490
°C/W
JA
Max
Characteristic (Both Junctions Heated)
Symbol
Unit
Note 2
Note 1
T A = 25°C
Total Device Dissipation
Derate above 25°C
P D
250
2.0
mW
385
3.0
mW/°C
Thermal Resistance – Junction-to-Ambient
Thermal Resistance – Junction-to-Lead
Junction and Storage Temperature
R θJA
493
188
°C/W
°C/W
°C
325
208
R θJL
T J , T stg
–55 to +150
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
http://www.SeCoSGmbH.com
Any changing of specification will not be informed individual
22-Jun-2007 Rev. A
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