Datasheet > S2061B

S2061B

更新时间： 2024-11-01 19:46:23

品牌	Logo	应用领域
AMCC		以太网：16GBASE-T 电信电信集成电路
页数	文件大小	规格书
16页	140K
描述
Ethernet Transceiver, Bipolar, PQFP64, 14 X 14 MM, HEAT SINK, PLASTIC, QFP-64

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技术参数
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S2061B 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	HQFP, QFP64,.66SQ,32
针数：	64	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.72
JESD-30 代码：	S-PQFP-G64	JESD-609代码：	e0
长度：	14 mm	功能数量：	1
端子数量：	64	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	HQFP	封装等效代码：	QFP64,.66SQ,32
封装形状：	SQUARE	封装形式：	FLATPACK, HEAT SINK/SLUG
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	2.35 mm
子类别：	Other Telecom ICs	最大压摆率：	577 mA
标称供电电压：	3.3 V	表面贴装：	YES
技术：	BIPOLAR	电信集成电路类型：	ETHERNET TRANSCEIVER
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	14 mm	Base Number Matches：	1

S2061B 数据手册

DEVICE

SPECIFICATION

S2061

SERIAL BACKPLANE TRANSCEIVER

BiCMOS PE L CLOCK GENERATOR

SERIAL BACKPLANE TRANSCEIVER

FEATURES

GENERAL DESCRIPTION

• Transmitter incorporates phase-locked loop

(PLL) providing clock synthesis from low-speed

reference

• Receiver PLL configured for clock and data

recovery

The S2061 transmitter and receiver chip is designed

to perform high-speed serial data transmission over

fiber optic or coaxial cable interfaces. The chip runs

at data rates from 1.0 to 1.25 Gbps with associated

10-bit data word.

• 1.0 – 1.25 Gbps operation

The chip performs parallel-to-serial and serial-to-par-

allel conversion, 8B/10B coding, and framing for

block-encoded data. The transmitter’s on-chip PLL

synthesizes the high-speed clock from a low-speed

reference. The receiver’s on-chip PLL synchronizes

directly to incoming digital signal to receive the data

stream. The transmitter and receiver each support

differential PECL-compatible I/O for fiber optic com-

ponent interfaces, to minimize crosstalk and maximize

data integrity. Local loopback mode is provided for

system diagnostics.

• 8-bit parallel TTL compatible interface

• 1.6W typical power dissipation

• +3.3V power supply

• Low-jitter serial PECL compatible interface

• Lock detect

• Local loopback

• 64 PQFP/TEP package

• Framing performed by receiver

• Continuous downstream clocking from receiver

• Drives 30m of Twinax cable directly

APPLICATIONS

Figure 1 shows a typical configuration incorporating

the chip, which is compatible with AMCC’s Crosspoint

switch products.

High-speed data communications

• Workstation

• Frame buffer

• Switched networks

• Data broadcast environments

• Proprietary extended backplanes

• RAID drives

• Mass storage devices

Figure 1. System Block Diagram

1000 GBE

OC-3

OC-12

Fibre Channel

S2061

MAC

OC-12

Fibre Channel

Crosspoint

Switch

S2016(16x16)

S2025(32x32)

S2028(32x32)

1000 GBE

OC-3

1000 GBE

OC-3

OC-12

S2061

MAC

OC-12

Fibre Channel

February 2, 1999 / Revision C

12 3 4 5 6 7...16

中文翻译

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与S2061B相关器件

型号	品牌	获取价格	描述	数据表
S2062TB	AMCC	获取价格	Ethernet Transceiver, Bipolar, PBGA156, 21 X 21 MM, COMPACT, TBGA-156
S2062TB	ROCHESTER	获取价格	Ethernet Transceiver, PBGA156, 21 X 21 MM, COMPACT, TBGA-156
S2063-FREQ-OUT25	DIODES	获取价格	ACMOS Output Clock Oscillator, 36MHz Min, 125MHz Max,
S2064A	AMCC	获取价格	Ethernet Transceiver, Bipolar, PBGA208, 23 X 23 MM, COMPACT, TBGA-208
S2065J	TECCOR	获取价格	SCRs 1-70 AMPS NON-SENSITIVE GATE
S2065J	LITTELFUSE	获取价格	SCRs (1 A to 70 A)
S2065J81	TECCOR	获取价格	Silicon Controlled Rectifier, 65A I(T)RMS, 200V V(DRM), 200V V(RRM), 1 Element, TO-218X, 3
S2065JTP	LITTELFUSE	获取价格	SCR NON-SENS 200V 65A ISO TO218X
S2065K	TECCOR	获取价格	SCRs
S2065K	LITTELFUSE	获取价格	SCRs (1 A to 70 A)

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