Datasheet > Q67100-Q2016

Q67100-Q2016

更新时间： 2024-01-22 15:48:10

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
9页	144K
描述
2M x 32-Bit Dynamic RAM Module

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中文翻译

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数据手册

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Q67100-Q2016 数据手册

2M x 32-Bit Dynamic RAM Module

HYM 322160S/GS-60/-70

Advanced Information

• 2 097 152 words by 32-Bit organization

• CAS-before-RAS refresh

(alternative 4 194 304 words by 16-Bit)

RAS-only-refresh

Hidden-refresh

• Fast access and cycle time

60 ns access time

• 8 decoupling capacitors mounted on

110 ns cycle time (-60 version)

70 ns access time

130 ns cycle time (-70 version)

substrate

• All inputs, outputs and clocks fully TTL

compatible

• Fast page mode capability with

40 ns cycle time (-60 version)

45 ns cycle time (-70 version)

• 72 pin double-sided Single in-Line Memory

Module with 25.4 mm (1000 mil) height

• Utilizes sixteen 1M × 4 DRAMs in 300 mil

• Single + 5 V (± 10 %) supply

SOJ packages

• Low power dissipation

• 1024 refresh cycles / 16 ms

max. 4840 mW active (-60 version)

max. 4400 mW active (-70 version)

CMOS – 88 mW standby

• Tin-Lead contact pads (S - version)

• Gold contact pads (GS - version)

TTL – 176 mW standby

Ordering Information

Type

Ordering Code

Package

Description

HYM 322160S-60

Q67100-Q2014

L-SIM-72-11

DRAM Module

(access time 60 ns)

HYM 322160S-70

HYM 322160GS-60

HYM 322160GS-70

Q67100-Q2015

Q67100-Q2016

Q67100-Q2017

DRAM Module

(access time 70 ns)

DRAM Module

(access time 60 ns)

DRAM Module

(access time 70 ns)

Semiconductor Group

551

09.94

12 3 4 5 6 7...9

中文翻译

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