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PTN3360DBS/S900 PDF预览

PTN3360DBS/S900

更新时间: 2024-11-13 15:48:39
品牌 Logo 应用领域
恩智浦 - NXP 商用集成电路
页数 文件大小 规格书
25页 481K
描述
IC SPECIALTY CONSUMER CIRCUIT, PQCC48, 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT619-1, HVQFN-48, Consumer IC:Other

PTN3360DBS/S900 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:HVQCCN,
针数:48Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.28
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PQCC-N48
长度:7 mm功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE认证状态:Not Qualified
座面最大高度:1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
宽度:7 mmBase Number Matches:1

PTN3360DBS/S900 数据手册

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PTN3360D  
Enhanced performance HDMI/DVI level shifter with active DDC  
buffer, supporting deep color mode  
Rev. 2 — 19 November 2010  
Product data sheet  
1. General description  
The PTN3360D is a high-speed level shifter device which converts four lanes of low-swing  
AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain  
current-steering differential output signals, up to 2.5 Gbit/s per lane to support 36-bit  
deep color mode. Each of these lanes provides a level-shifting differential buffer to  
translate from low-swing AC-coupled differential signaling on the source side, to  
TMDS-type DC-coupled differential current-mode signaling terminated into 50 Ω to 3.3 V  
on the sink side. Additionally, the PTN3360D provides a single-ended active buffer for  
voltage translation of the HPD signal from 5 V on the sink side to 3.3 V on the source side  
and provides a channel with active buffering and level shifting of the DDC channel  
(consisting of a clock and a data line) between 3.3 V source-side and 5 V sink-side. The  
DDC channel is implemented using active I2C-bus buffer technology providing capacitive  
isolation, redriving and level shifting as well as disablement (isolation between source and  
sink) of the clock and data lines.  
The low-swing AC-coupled differential input signals to the PTN3360D typically come from  
a display source with multi-mode I/O, which supports multiple display standards, e.g.,  
DisplayPort, HDMI and DVI. While the input differential signals are configured to carry DVI  
or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0  
or HDMI v1.3a specification. By using PTN3360D, chip set vendors are able to implement  
such reconfigurable I/Os on multi-mode display source devices, allowing the support of  
multiple display standards while keeping the number of chip set I/O pins low. See  
Figure 1.  
The PTN3360D main high-speed differential lanes feature low-swing self-biasing  
differential inputs which are compliant to the electrical specifications of DisplayPort  
Standard v1.1 and/or PCI Express Standard v1.1, and open-drain current-steering  
differential outputs compliant to DVI v1.0 and HDMI v1.3a electrical specifications. The  
I2C-bus channel actively buffers as well as level-translates the DDC signals for optimal  
capacitive isolation. The PTN3360D also supports power-saving modes in order to  
minimize current consumption when no display is active or connected.  
The PTN3360D is a fully featured HDMI as well as DVI level shifter. The PTN3360D  
supersedes PTN3360B, and provides a better high speed performance with a  
programmable equalizer.  
PTN3360D is powered from a single 3.3 V power supply consuming a small amount of  
power (230 mW typ.) and is offered in a 48-terminal HVQFN48 package. PTN3360D has  
two pinning options. PTN3360DBS has its pin 6 as REXT to provide a higher accuracy  
current reference, and PTN3360DBS/S900 pin 6 is not connected providing more  
flexibility. See Section 7.2 for details.  

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