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PTN3392BS/F3,518 PDF预览

PTN3392BS/F3,518

更新时间： 2024-09-25 21:16:51
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
32页 281K
描述
PTN3392 - 2-lane DisplayPort to VGA adapter IC QFN 48-Pin

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PTN3392BS/F3,518 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：QFN包装说明：HVQCCN,
针数：48Reach Compliance Code：compliant
风险等级：5.03模拟集成电路 - 其他类型：ANALOG CIRCUIT
JESD-30 代码：S-PQCC-N48长度：7 mm
湿度敏感等级：3功能数量：1
端子数量：48最高工作温度：85 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：NOT SPECIFIED
座面最大高度：1 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES温度等级：OTHER
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7 mmBase Number Matches：1

PTN3392BS/F3,518 数据手册

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PTN3392  
2-lane DisplayPort to VGA adapter IC  
Rev. 5 — 5 June 2014  
Product data sheet  
1. General description  
The PTN3392 is a DisplayPort to VGA adapter IC designed to connect a DisplayPort  
source to a VGA sink. The PTN3392 integrates a DisplayPort receiver and a high-speed  
triple video digital-to-analog converter that supports display resolutions from VGA to  
WUXGA (see Table 5). The PTN3392 supports either one or two DisplayPort v1.1a lanes  
operating at either 2.7 Gbit/s or 1.62 Gbit/s per lane. The PTN3392 has ‘Flash-over-AUX’  
capability enabling simple firmware upgradability in the field.  
The PTN3392 supports I2C-bus over AUX per DisplayPort v1.1a specification (Ref. 1),  
and bridges the VESA DDC channel to the DisplayPort Interface.  
The PTN3392 is designed for single supply and minimizes application costs. It can be  
powered directly from the DisplayPort source side 3.3 V supply without a need for  
additional core voltage regulator. The VGA output is powered down when there is no valid  
DisplayPort source data being transmitted. The PTN3392 also aids in monitor detection  
by performing load sensing and reporting sink connection status to the source.  
2. Features and benefits  
2.1 VESA-compliant DisplayPort v1.1a converter  
Main Link: 1-lane and 2-lane modes supported  
HBR (High Bit Rate) at 2.7 Gbit/s per lane  
RBR (Reduced Bit Rate) at 1.62 Gbit/s per lane  
BER (Bit Error Rate) better than 109  
Down-spreading SSC (Spread Spectrum Clocking) supported  
1 MHz AUX channel  
Supports native AUX CH syntax  
Supports I2C-bus over AUX CH syntax  
Hot Plug Detect (HPD) signal to the source  
Cost-effective design optimized for VGA application  
2.2 DDC channel output  
Supports 100 kbit/s I2C-bus speed, declared in DPCD register  
Support of I2C-bus speed control by DisplayPort source via DPCD registers,  
facilitating use of longer VGA cables  
I2C Over Aux feature facilitates full support of MCCS, DDC-CI, and DDC protocols  
(see Ref. 2)  
 
 
 
 
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PTN3392BS/F3,518 替代型号

型号 品牌 替代类型 描述 数据表
PTN3392BS/F1,518 NXP

完全替代

 PTN3392 - 2-lane DisplayPort to VGA adapter IC QFN 48-Pin
PTN3392BS,518 NXP

完全替代

 PTN3392 - 2-lane DisplayPort to VGA adapter IC QFN 48-Pin

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