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PTN3361BBS PDF预览

PTN3361BBS

更新时间: 2024-11-13 09:58:31
品牌 Logo 应用领域
恩智浦 - NXP 转换器电平转换器消费电路商用集成电路
页数 文件大小 规格书
29页 146K
描述
HDMI/DVI level shifter with dongle detect support and active DDC buffer

PTN3361BBS 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT619-1, HVQFN-48针数:48
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.57Is Samacsys:N
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PQCC-N48
JESD-609代码:e4长度:7 mm
湿度敏感等级:2功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:NICKEL PALLADIUM GOLD端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:7 mm
Base Number Matches:1

PTN3361BBS 数据手册

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PTN3361B  
HDMI/DVI level shifter with dongle detect support and active  
DDC buffer  
Rev. 02 — 7 October 2009  
Product data sheet  
1. General description  
The PTN3361B is a high-speed level shifter device which converts four lanes of low-swing  
AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain  
current-steering differential output signals, up to 1.65 Gbit/s per lane. Each of these lanes  
provides a level-shifting differential buffer to translate from low-swing AC-coupled  
differential signaling on the source side, to TMDS-type DC-coupled differential  
current-mode signaling terminated into 50 to 3.3 V on the sink side. Additionally, the  
PTN3361B provides a single-ended active buffer for voltage translation of the HPD signal  
from 5 V on the sink side to 3.3 V on the source side and provides a channel with active  
buffering and level shifting of the DDC channel (consisting of a clock and a data line)  
between 3.3 V source-side and 5 V sink-side. The DDC channel is implemented using  
active I2C-bus buffer technology providing capacitive isolation, redriving and level shifting  
as well as disablement (isolation between source and sink) of the clock and data lines.  
The low-swing AC-coupled differential input signals to the PTN3361B typically come from  
a display source with multi-mode I/O, which supports multiple display standards, e.g.,  
DisplayPort, HDMI and DVI. While the input differential signals are configured to carry DVI  
or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0 or  
HDMI v1.3a specification. By using PTN3361B, chip set vendors are able to implement  
such reconfigurable I/Os on multi-mode display source devices, allowing the support of  
multiple display standards while keeping the number of chip set I/O pins low. See  
Figure 1.  
The PTN3361B main high-speed differential lanes feature low-swing self-biasing  
differential inputs which are compliant to the electrical specifications of DisplayPort  
Standard v1.1 and/or PCI Express Standard v1.1, and open-drain current-steering  
differential outputs compliant to DVI v1.0 and HDMI v1.3a electrical specifications. The  
I2C-bus channel actively buffers as well as level-translates the DDC signals for optimal  
capacitive isolation. Its I2C-bus control block also provides for optional software HDMI  
dongle detect by issuing a predetermined code sequence upon a read command to an  
I2C-bus specified address. The PTN3361B also supports power-saving modes in order to  
minimize current consumption when no display is active or connected.  
The PTN3361B is a fully featured HDMI as well as DVI level shifter. It is functionally  
comparable to PTN3360B but provides additional features supporting HDMI dongle  
detection and active DDC buffering. For HDMI dongles, support of HDMI dongle detection  
via the DDC channel is mandatory, hence HDMI dongle applications should enable this  
feature for correct operation in accordance with DisplayPort interoperability guidelines.  
PTN3361B is powered from a single 3.3 V power supply consuming a small amount of  
power (90 mW typ.) and is offered in a 48-terminal HVQFN48 package.  

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