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PSMN006-20K,118 PDF预览

PSMN006-20K,118

更新时间: 2024-02-11 06:25:51
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
12页 175K
描述
PSMN006-20K - N-channel TrenchMOS SiliconMAX ultra low level FET SOIC 8-Pin

PSMN006-20K,118 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
针数:8Reach Compliance Code:unknown
风险等级:5.7Base Number Matches:1

PSMN006-20K,118 数据手册

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PSMN006-20K  
N-channel TrenchMOS SiliconMAX ultra low level FET  
Rev. 01 — 17 November 2009  
Product data sheet  
1. Product profile  
1.1 General description  
SiliconMAX ultra low level N-channel enhancement mode Field-Effect Transistor (FET) in  
a plastic package using TrenchMOS technology. This product is designed and qualified for  
use in computing, communications, consumer and industrial applications only.  
1.2 Features and benefits  
„ Low conduction losses due to low  
„ Suitable for very low gate drive  
on-state resistance  
sources  
1.3 Applications  
„ Computer motherboards  
„ DC-to-DC convertors  
„ Switched-mode power supplies  
1.4 Quick reference data  
Table 1.  
Quick reference  
Symbol Parameter  
Conditions  
drain-source voltage Tj 25 °C; Tj 150 °C  
Min  
Typ  
Max Unit  
VDS  
ID  
-
-
-
-
20  
32  
V
A
drain current  
Tsp = 25 °C; VGS = 4.5 V;  
see Figure 1 and 3  
Ptot  
total power  
dissipation  
Tsp = 25 °C; see Figure 2  
-
-
-
8.3  
-
W
Dynamic characteristics  
QGD gate-drain charge  
VGS = 2.5 V; ID = 30 A;  
VDS = 10 V; Tj = 25 °C;  
see Figure 11  
13.2  
nC  
Static characteristics  
RDSon  
drain-source  
on-state resistance  
VGS = 2.5 V; ID = 5 A;  
Tj = 25 °C; see Figure 9 and 10  
-
-
-
4.8  
5.7  
4.2  
5.7  
8.2  
5
mΩ  
mΩ  
mΩ  
VGS = 1.8 V; ID = 5 A;  
Tj = 25 °C; see Figure 10  
VGS = 4.5 V; ID = 5 A;  
Tj = 25 °C; see Figure 9 and 10  
 
 
 
 
 

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