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PO74G27ASU PDF预览

PO74G27ASU

更新时间: 2024-11-15 06:04:35
品牌 Logo 应用领域
POTATO 输入元件
页数 文件大小 规格书
6页 461K
描述
TRIPLE 3-INPUT POSITIVE-NOR GATES

PO74G27ASU 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.78
Base Number Matches:1

PO74G27ASU 数据手册

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PO74G27A  
TRIPLE 3-INPUT POSITIVE-NOR GATES  
02/06/07  
74 Series GHz Logic  
FEATURES:  
DESCRIPTION:  
. Patented technology  
Potato Semiconductor’s PO74G27A is designed for  
world top performance using submicron CMOS  
technology to achieve 800MHz TTL /CMOS output  
frequency with less than 1.7ns propagation delay.  
. Operating frequency up to 800MHz with 2pf load  
. Operating frequency up to 700MHz with 5pf load  
. Operating frequency up to 400MHz with 15pf load  
. VCC Operates from 1.65V to 3.6V  
This triple 3-input positive-NOR gate is designed for  
1.65-V to 3.6-V VCC operation.  
. Propagation delay < 1.7ns max with 15pf load  
. Low input capacitance: 4pf typical  
The PO74G27A performs the Boolean function  
Y= A + B + C or Y= A · B · C in positive logic.  
. Available in 14pin 150mil wide SOIC package  
Inputs can be driven from either 3.3V or 5V devices.  
This feature allows the use of these devices as  
translators in a mixed 3.3V/5V system environment.  
Pin Configuration  
Logic Block Diagram  
1A  
1B  
1C  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
V
CC  
1Y  
1C  
1Y  
3C  
3B  
3A  
3Y  
2A  
2A  
2B  
2C  
2B  
2Y  
3Y  
2C  
2Y  
3A  
3B  
3C  
GND  
8
Pin Description  
INPUTS  
OUTPUT  
Y
A
H
X
X
L
B
X
H
X
L
C
X
X
H
L
L
L
L
H
1
Copyright © Potato Semiconductor Corporation  

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