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PI74AVC16646A PDF预览

PI74AVC16646A

更新时间: 2024-09-14 21:20:55
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
11页 301K
描述
Registered Bus Transceiver, AVC Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.240 INCH, PLASTIC, TSSOP-48

PI74AVC16646A 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.76控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:AVC
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:12.5 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:3.3 V
Prop。Delay @ Nom-Sup:3.9 ns传播延迟(tpd):5.6 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
翻译:N/A触发器类型:POSITIVE EDGE
宽度:6.1 mmBase Number Matches:1

PI74AVC16646A 数据手册

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PI74AVC+16646  
2.5V 16-Bit Bus Transceiver and  
Register with 3-State Outputs  
Product Features  
ProductDescription  
Pericom Semiconductor’s PI74AVC+ series of logic circuits are  
produced using the Company’s advanced sub-micron CMOS  
technology, achieving industry leading speed.  
• PI74AVC+16646 is designed for low voltage operation,  
V
= 1.65V to 3.6V  
CC  
• True ±24mA Balanced Drive @ 3.3V  
• I supports partial power-down operation  
ThePI74AVC+16646isa16-bitbustransceiverandregisterdesigned  
OFF  
for 1.65V to 3.6V V operation. It can be used as two 8-bit  
CC  
• 3.6V I/O Tolerant Inputs and Outputs  
transceivers or one 16-bit transceiver. Data on the A or B bus is  
clocked into the registers on the low-to-high transition of the  
appropriateClock(CLKABorCLKBA)input.Fourfundamentalbus-  
management functions can be performed.  
• All outputs contain a patented DDC  
(Dynamic DriveControl) circuit that reduces noise without  
degrading propagation delay.  
OutputEnable(OE)andDirectionControl(DIR)inputsareprovided  
to control the transceiver functions. In the transceiver mode, data  
present at the high-impedance port may be stored in either register  
or in both. The Select Control (SAB and SBA) inputs can multiplex  
stored and real-time (transparent mode) data. Circuitry used for  
Select Control eliminates the typical decoding glitch that occurs in  
amultiplexerduringthetransitionbetweenstoredandreal-timedata.  
DIR determines which bus receives data when OE is LOW. In the  
isolationmode(OEHIGH), Adatamaybestoredinoneregisterand/  
or B data may be stored in the other register.  
• Industrial operation at –40°C to +85°C  
• Available Packages:  
– 56-pin 240 mil wide plastic TSSOP (A)  
– 56-pin 173 mil wide plastic TVSOP (K)  
When an output function is disabled, the input function is still  
enabled and may be used to store and transmit data. Only one of the  
two buses, A or B, can be driven at a time.  
Toensurethehigh-impedancestateduringpoweruporpowerdown,  
OE should be tied to V through a pullup resistor; the minimum  
CC  
value of the resistor is determined by the current-sinking capability  
of the driver.  
Logic Block Diagrams  
56  
1OE  
29  
2OE  
1
1DIR  
28  
2DIR  
55  
1CLKBA  
30  
2CLKBA  
54  
1SBA  
31  
2SBA  
2
1CLKAB  
27  
2CLKAB  
3
1SAB  
26  
2SAB  
One of Eight Channels  
1D  
C1  
One of Eight Channels  
1D  
C1  
5
1A1  
15  
2A1  
52  
1B1  
42  
2B1  
1D  
C1  
1D  
C1  
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
PS8506B  
02/26/01  
1

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