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PI74AVC16821A PDF预览

PI74AVC16821A

更新时间: 2024-11-05 15:47:55
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路触发器
页数 文件大小 规格书
5页 311K
描述
Bus Driver, AVC Series, 2-Func, 10-Bit, True Output, CMOS, PDSO48, 0.240 INCH, PLASTIC, TSSOP-48

PI74AVC16821A 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.92系列:AVC
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:12.5 mm逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.024 A
位数:10功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源:3.3 V
Prop。Delay @ Nom-Sup:4.5 ns传播延迟(tpd):6.4 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:6.1 mmBase Number Matches:1

PI74AVC16821A 数据手册

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ADVANCE INFORMATION  
PI74AVC16821  
PI74AVCH16821  
20-Bit Bus Interface Flip-Flop  
with 3-State Outputs  
Product Features  
Description  
Pericom Semiconductor’s PI74AVC series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
Designed for low voltage operation, VCC = 1.65V to 3.6V  
Sub 2.0ns delays at 2.5V and 3.3V  
Dynamic Impedance Control on outputs, current  
drive > ±24mA at 2.5VCC  
This 20-bit bus interface flip-flop can be used as two 10-bit flip-  
flops or one 20-bit flip-flops. The 20 flip-flops are edge-triggered  
D-type flip-flops. On the positive transition of the clock (CLK)  
input, the device provides true data at the Q outputs.  
Patented noise reduction circuit  
I/O Tolerant to 3.6V, Inputs and Outputs for  
mixed voltage systems  
A buffered output-enable (OE) input can be used to place the ten  
outputsineitheranormallogicstate(HIGHorLOWlevel)orahigh-  
impedance state. In the high-impedance state, the outputs neither  
loadnordrivethebuslinessignificantly.Thehigh-impedancestate  
and increased drive provide the capacity to drive bus lines without  
the need for interface or pullup components.  
Supports live insertion  
Industrial operation at -40°C to +85°C  
Available Packages:  
– 48-pin 240 mil wide plastic TSSOP (A48)  
– 48-pin 173 mil wide plastic TVSOP (K48)  
OE does not affect the internal operation of the flip-flops. Old data  
can be retained or new data can be entered while the outputs are in  
the high-impedance state.  
To ensure the high-impedance state during power up or power  
down, OE should be tied to VCC through a pullup resistor; the  
minimum value of the resistor is determined by the current sinking  
capability of the driver.  
ThePI74AVCH16821has“BusHold”whichretainsthe data input’s  
laststatewheneverthedatainputgoestohighimpedancepreventing  
“floating”inputsandeliminatingtheneedforpullup/downresistors.  
LogicBlockDiagram  
1
28  
1OE  
2OE  
56  
55  
29  
42  
1CLK  
2CLK  
One of Ten  
Channels  
One of Ten  
Channels  
C
1
C1  
2
15  
1D  
1
1Q  
1
2D  
1
2Q1  
1
D
1D  
TO 9 OTHER CHANNELS  
TO 9 OTHER CHANNELS  
PSXXXX  
02/01/99  
1

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