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PI74ALVTC16601AEX PDF预览

PI74ALVTC16601AEX

更新时间: 2024-10-28 15:47:55
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路
页数 文件大小 规格书
9页 149K
描述
Registered Bus Transceiver, ALVT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TSSOP-56

PI74ALVTC16601AEX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
系列:ALVTJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:14 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER湿度敏感等级:1
位数:18功能数量:1
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):5.3 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:6.1 mm
Base Number Matches:1

PI74ALVTC16601AEX 数据手册

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PI74ALVTC16601  
2.5V, 18-Bit Universal Bus Transceiver  
with 3-State Outputs  
ProductFeatures  
ProductDescription  
• PI74ALVTC16601isdesignedforlowvoltageoperation,  
Pericom Semiconductor’s PI74ALVTC series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
V
DD  
=1.65Vto3.6V  
• Supports Live Insertion  
The PI74ALVTC16601 uses D-type latches and D-type flip-flops  
with 3-state outputs to allow data flow in transparent, latched, and  
clocked modes.  
• 3.6V I/O Tolerant Inputs and Outputs  
• Bus Hold  
• HighDrive,–32/64mA@3.3V  
• Uses patented noise reduction circuitry  
• Power-off high impedance inputs and outputs  
• Industrial operation at –40°C to +85°C  
• Packagesavailable:  
Data flow in each direction is controlled by Output Enable (OEAB  
andOEBA),LatchedEnable(LEABandLEBA),andClock(CLKAB  
andCLKBA)inputs.TheclockcanbecontrolledbytheClockEnable  
(CLKENABandCLKENBA)inputs.ForA-to-Bdataflow,thedevice  
operatesinthetransparentmodewhenLEABisHIGH.WhenLEAB  
isLOW,theAdataislatchedifCLKABisheldatahighorlowlogic  
level.IfLEABislow,theA-busisstoredinthelatch/flip-floponthe  
low-to-high transition of CLKAB. When OEAB is low, the outputs  
are active. When OEAB is HIGH, the outputs are in the high-  
impedance state.  
–56-pin240-milwideplasticTSSOP(A56)  
–56-pin173-milwideplasticTVSOP(K56)  
DataflowforBtoAissimilartothatofAtoBbutusesOEBA,LEBA,  
CLKBA,andCLKENBA.  
LogicBlockDiagram  
To ensure the high-impedance state during power up  
or power down, OE should be tied to V through a  
DD  
1
OEAB  
pull-up resistor; the minimum value of the resistor is  
determined by the current-sinking capability of the  
driver.  
56  
CLKENAB  
55  
CLKAB  
ThePI74ALVTC16601offersbothI/OTolerant,which  
allows it to operate in mixed 1.65/3.6V systems, and  
“Bus Hold” which retains the data input’s last state  
preventing“floating”inputsandeliminatingtheneed  
for pullup/down resistors.  
2
LEAB  
28  
LEBA  
30  
CLKBA  
29  
CLKENBA  
27  
OEBA  
CE  
1D  
C1  
3
A1  
54  
B1  
CLK  
CE  
1D  
C1  
CLK  
To 17 Other Channels  
PS8595  
01/22/02  
1

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