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PI74ALVTC16374VX PDF预览

PI74ALVTC16374VX

更新时间: 2024-10-28 21:21:07
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路触发器
页数 文件大小 规格书
10页 352K
描述
Bus Driver, ALVT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, 0.635 MM PITCH, PLASTIC, SSOP-48

PI74ALVTC16374VX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP48,.4
针数:48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.92系列:ALVT
JESD-30 代码:R-PDSO-G48长度:15.875 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:250000000 Hz最大I(ol):0.064 A
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP48,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
Prop。Delay @ Nom-Sup:3.2 ns传播延迟(tpd):4.8 ns
认证状态:Not Qualified座面最大高度:2.794 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.8 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.5 mmBase Number Matches:1

PI74ALVTC16374VX 数据手册

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PI74ALVTC16374  
16-Bit D-Type Flip-Flop  
with 3-State Outputs  
Product Features  
Product Description  
• The PI74ALVTC Family is designed for low voltage  
operation, VDD =1.8Vto3.6V  
The PI74ALVTC16374 is particularly suitable for implementing  
buffer registers, I/O ports, bidirectional bus drivers, and working  
registers. This device can be used as two 8-bit flip-flops or one 16-  
bitflip-flop.Onthepositivetransitionoftheclock(CLK)input,the  
Q outputs of the flip-flop take on the logic levels set up at the data  
(D) inputs.  
• Supports Live Insertion  
• 3.6V I/O Tolerant Inputs and Outputs  
• Bus Hold  
• HighDrive,32/64mA@3.3V  
AbufferedOutputEnable(OE)inputcanbeusedtoplacetheeight  
outputs in either a normal logic state (high or low logic levels) or  
a high-impedance state in which the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and the  
increased drive provide the capability to drive bus lines without  
need for interface or pullup components. OE does not affect  
internaloperationsoftheflip-flop.Olddatacanberetainedornew  
data can be entered while the outputs are in the high-impedance  
state.  
• Uses patented Noise Reduction Circuitry  
• Power-Off high impedance inputs and outputs  
• Industrial operation at –40°C to +85°C  
• Packaging(Pb-free&Greenavailable):  
48-pin240milwideplasticTSSOP(A)  
48-pin173milwideplasticSSOP(V)  
To ensure the high-impedance state during power up or power  
down, OE should be tied to VDD through a pullup resistor; whose  
minimum value is determined by the current-sinking capability of  
the driver.  
LogicBlockDiagram  
1
1OE  
The family offers both I/O Tolerant, which allows it to operate in  
mixed 1.8/3.6V systems, and “Bus Hold,” which retains the data  
input’s last state whenever the data input goes to high-imped-  
ance, preventing “floating” inputs and eliminating the need for  
pullup/down resistors.  
48  
1CLK  
>C1  
2
1Q1  
47  
1D1  
1D  
To Seven Other Channels  
24  
25  
2OE  
2CLK  
>C1  
1D  
13  
2Q1  
36  
2D1  
To Seven Other Channels  
PS8356B 05/31/06  
06-0159  
1

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