Datasheet > PI6CV857B

PI6CV857B

更新时间： 2024-11-28 23:27:39

品牌	Logo	应用领域
其他 - ETC		时钟驱动器双倍数据速率
页数	文件大小	规格书
9页	182K
描述
Clock IC \| 2.5V. 200 MHz. 10 Output SSTL-2 Clock Driver for DDR DIMM

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PI6CV857B 数据手册

PI6CV857B

1:10 PLL Clock Driver for

2.5V DDR-SDRAM Memory

ProductFeatures

ProductDescription

• Operating Frequency up to 200 MHz and exceeds PC2700

RDIMMspecification

PI6CV857BPLLclockdeviceisdevelopedforregisteredDDRDIMM

applicationsThisPLLClockBufferisdesignedfor2.5V and2.5V

DDQ

• Distributes one differential clock input pair to ten differential

operation and differential data input and output levels.

clock output pairs.

The device is a zero delay buffer that distributes a differential clock

inputpair(CLK,CLK)totendifferentialpairsofclockoutputs(Y[0:9],

Y[0:9]) and one differential pair feedback clock outputs

(FBOUT,FBOUT) . The clock outputs are controlled by the input

clocks (CLK, CLK), the feedback clocks (FBIN,FBIN), the 2.5V

• Inputs(CLK,CLK)and(FBIN,FBIN): SSTL_2

• Input PWRDWN: LVCMOS

• Outputs (Yx,Yx),(FBOUT,FBOUT): SSTL_2

• Externalfeedbackpins(FBIN,FBIN)areusedto

LVCMOSinput(PWRDWN)andtheAnalogPowerinput(AV ).

synchronize the outputs to the clock input.

When input PWRDWN is low while power is applied, the input

• Operates at AV = 2.5V for core circuit and internal PLL,

receiversaredisabled,thePLListurnedoffandthedifferentialclock

and V

= 2.5V for differential output drivers

DDQ

outputs are 3-stated. When the AV is strapped low, the PLL is

• Packages(Pb-freeandGreenavailable):

-48-pinTSSOP

turned off and bypassed for test purposes.

When the input frequency falls below a suggested detection fre-

quency that is below the operating frequency of the PLL, the device

willenteralowpowermode.Aninputfrequencydetectioncircuitwill

detectthelowfrequencyconditionandperformthesamelowpower

features as when the PWRDWN input is low.

ThePLLinthePI6CV857Bclockdriverusestheinputclocks(CLK,

CLK)andthefeedbackclocks(FBIN,FBIN)toprovidehigh-perfor-

mance,low-skew,low-jitteroutputdifferentialclocks(Y[0:9],Y[0:9]).

ThePI6CV857BisalsoabletotrackSpreadSpectrumClockingfor

reducedEMI.

BlockDiagram

PinConfigurations: 48-pinTSSOP(packagecodeA)

GND

CLK

PLL

FBIN

D D Q

FBIN

GND

D D Q

CLK

D D Q

P W R DW N

FBIN

Powerdown

PWRDWN

D D Q

and Test

FBOUT

D D

Logic

AGND

GND

D D Q

GND

FBOUT

PS8639B

10/29/03

12 3 4 5 6 7...9

中文翻译

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与PI6CV857B相关器件

型号	品牌	获取价格	描述	数据表
PI6CV857BA	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 0.240
PI6CV857BAE	PERICOM	获取价格	暂无描述
PI6CV857BAEX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 0.240
PI6CV857BAI	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO48,
PI6CV857BAIE	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 0.240
PI6CV857L	PERICOM	获取价格	PLL Clock Driver for 2.5V DDR-SDRAM Memory
PI6CV857LA	PERICOM	获取价格	PLL Clock Driver for 2.5V DDR-SDRAM Memory
PI6CV857LAE	PERICOM	获取价格	暂无描述
PI6CV857LAEX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 0.240
PI6CV857LAX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 0.240

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