Datasheet > PHD18NQ10T,118

PHD18NQ10T,118

更新时间： 2024-11-07 15:47:51

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
12页	123K
描述
N-channel TrenchMOS standard level FET DPAK 3-Pin

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技术参数
数据手册

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PHD18NQ10T,118 技术参数

Source Url Status Check Date：	2013-06-14 00:00:00	是否Rohs认证：	符合
生命周期：	Transferred	零件包装代码：	DPAK
针数：	3	Reach Compliance Code：	unknown
风险等级：	5.72	Base Number Matches：	1

PHD18NQ10T,118 数据手册

Philips Semiconductors

Product specification

N-channel TrenchMOS transistor

PHP18NQ10T, PHB18NQ10T

PHD18NQ10T

FEATURES

SYMBOL

QUICK REFERENCE DATA

• ’Trench’ technology

• Low on-state resistance

• Fast switching

V_DSS= 100 V

I_D= 18 A

• Low thermal resistance

R_DS(ON)≤ 90 mΩ

GENERAL DESCRIPTION

N-channel enhancement mode field-effect power transistor in a plastic envelope using ’trench’ technology.

Applications:-

• d.c. to d.c. converters

• switched mode power supplies

The PHP18NQ10T is supplied in the SOT78 (TO220AB) conventional leaded package.

The PHB18NQ10T is supplied in the SOT404 (D²PAK) surface mounting package.

The PHD18NQ10T is supplied in the SOT428 (DPAK) surface mounting package.

PINNING

SOT78 (TO220AB)

SOT404 (D²PAK)

SOT428 (DPAK)

tab

DESCRIPTION

tab

gate

drain ¹

source

1 2 3

tab drain

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DSS

V_DGR

V_GS

I_D

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Continuous drain current

T_j= 25 ˚C to 175˚C

T_j= 25 ˚C to 175˚C; R_GS= 20 kΩ

100

± 20

˚C

T_mb= 25 ˚C; V_GS= 10 V

T_mb= 100 ˚C; V_GS= 10 V

T_mb= 25 ˚C

I_DM

P_D

T_j, T_stg

Pulsed drain current

Total power dissipation

Operating junction and

storage temperature

T_mb= 25 ˚C

175

- 55

1 It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages.

August 1999

Rev 1.000

12 3 4 5 6 7...12

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