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PAM1707BZKBD4

更新时间： 2024-09-21 05:59:31
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德州仪器 - TI 微处理器
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198页 1319K
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AM1707 ARM Microprocessor

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AM1707  
www.ti.com  
SPRS637–FEBRUARY 2010  
AM1707 ARM Microprocessor  
Check for Samples: AM1707  
1 AM1707 ARM Microprocessor  
1.1 Features  
123  
With One Chip-Select  
• Applications  
• Programmable Real-Time Unit Subsystem  
(PRUSS)  
– Industrial Automation  
– Home Automation  
– Test and Measurement  
– Portable Data Terminals  
– Eduational Consoles  
– Two Independent Programmable Realtime  
Unit (PRU) Cores  
•
•
•
•
32-Bit Load/Store RISC architecture  
4K Byte instruction RAM per core  
512 Bytes data RAM per core  
PRU Subsystem (PRUSS) can be disabled  
via software to save power  
– Power Protection Systems  
• 375/456-MHz ARM926EJ-S™ RISC Core  
– 32-Bit and 16-Bit (Thumb®) Instructions  
– Single Cycle MAC  
– ARM® Jazelle® Technology  
– EmbeddedICE-RT™ for Real-Time Debug  
• ARM9 Memory Architecture  
– 16K-Byte Instruction Cache  
– 16K-Byte Data Cache  
– 8K-Byte RAM (Vector Table)  
– 64K-Byte ROM  
• Enhanced Direct-Memory-Access Controller 3  
(EDMA3):  
– Standard power management mechanism  
•
•
Clock gating  
Entire subsystem under a single PSC  
clock gating domain  
– Dedicated interrupt controller  
– Dedicated switched central resource  
• Multimedia Card (MMC)/Secure Digital (SD)  
Card Interface with Secure Data I/O (SDIO)  
• Two Master/Slave Inter-Integrated Circuit (I2C  
Bus™)  
– 2 Transfer Controllers  
– 32 Independent DMA Channels  
– 8 Quick DMA Channels  
• One Host-Port Interface (HPI) With 16-Bit-Wide  
Muxed Address/Data Bus For High Bandwidth  
• USB 1.1 OHCI (Host) With Integrated PHY  
(USB1)  
• USB 2.0 OTG Port With Integrated PHY (USB0)  
– USB 2.0 High-/Full-Speed Client  
– USB 2.0 High-/Full-/Low-Speed Host  
– End Point 0 (Control)  
– Programmable Transfer Burst Size  
• 128K-Byte RAM Memory  
• 3.3V LVCMOS IOs (except for USB interfaces)  
• Two External Memory Interfaces:  
– EMIFA  
– End Points 1,2,3,4 (Control, Bulk, Interrupt or  
ISOC) Rx and Tx  
•
•
•
NOR (8-/16-Bit-Wide Data)  
NAND (8-/16-Bit-Wide Data)  
16-Bit SDRAM With 128MB Address  
Space  
• Three Multichannel Audio Serial Ports:  
– Transmit/Receive Clocks up to 50 MHz  
– Six Clock Zones and 28 Serial Data Pins  
– Supports TDM, I2S, and Similar Formats  
– DIT-Capable (McASP2)  
– EMIFB  
32-Bit or 16-Bit SDRAM With 256MB  
Address Space  
•
• Three Configurable 16550 type UART Modules:  
– UART0 With Modem Control Signals  
– 16-byte FIFO  
– 16x or 13x Oversampling Option  
• LCD Controller  
– FIFO buffers for Transmit and Receive  
• 10/100 Mb/s Ethernet MAC (EMAC):  
– IEEE 802.3 Compliant (3.3-V I/O Only)  
– RMII Media Independent Interface  
– Management Data I/O (MDIO) Module  
• Real-Time Clock With 32 KHz Oscillator and  
• Two Serial Peripheral Interfaces (SPI) Each  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
ARM926EJ-S, EmbeddedICE-RT, ETM9, CoreSight are trademarks of ARM Limited.  
ARM, Jazelle are registered trademarks of ARM Limited.  
ADVANCE INFORMATION concerns new products in the sampling  
or preproduction phase of development. Characteristic data and other  
specifications are subject to change without notice.  
Copyright © 2010, Texas Instruments Incorporated  
 
 
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