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P89LPC9251FDH PDF预览

P89LPC9251FDH

更新时间: 2024-10-27 11:47:35
品牌 Logo 应用领域
恩智浦 - NXP 闪存微控制器和处理器外围集成电路光电二极管时钟
页数 文件大小 规格书
74页 319K
描述
8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB 3 V byte-erasable flash with 8-bit ADC

P89LPC9251FDH 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:,针数:20
Reach Compliance Code:unknown风险等级:5.84
Is Samacsys:NJESD-30 代码:R-PDSO-G20
湿度敏感等级:1端子数量:20
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not Qualified表面贴装:YES
技术:CMOS端子形式:GULL WING
端子位置:DUAL处于峰值回流温度下的最长时间:30
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

P89LPC9251FDH 数据手册

 浏览型号P89LPC9251FDH的Datasheet PDF文件第2页浏览型号P89LPC9251FDH的Datasheet PDF文件第3页浏览型号P89LPC9251FDH的Datasheet PDF文件第4页浏览型号P89LPC9251FDH的Datasheet PDF文件第5页浏览型号P89LPC9251FDH的Datasheet PDF文件第6页浏览型号P89LPC9251FDH的Datasheet PDF文件第7页 
P89LPC9201/9211/922A1/9241/  
9251  
8-bit microcontroller with accelerated two-clock 80C51 core  
2 kB/4 kB/8 kB 3 V byte-erasable flash with 8-bit ADC  
Rev. 01 — 16 April 2009  
Preliminary data sheet  
1. General description  
The P89LPC9201/9211/922A1/9241/9251 is a single-chip microcontroller, available in low  
cost packages, based on a high performance processor architecture that executes  
instructions in two to four clocks, six times the rate of standard 80C51 devices. Many  
system-level functions have been incorporated into the device in order to reduce  
component count, board space, and system cost.  
2. Features  
2.1 Principal features  
I 2 kB/4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and  
64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data  
storage.  
I 256-byte RAM data memory.  
I 4-input multiplexed 8-bit ADC/single DAC output (P89LPC9241/9251). Two analog  
comparators with selectable inputs and reference source.  
I On-chip temperature sensor integrated with ADC module (P89LPC9241/9251).  
I Two 16-bit counter/timers (each may be configured to toggle a port output upon timer  
overflow or to become a PWM output).  
I A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit  
prescaler and a programmable and readable 16-bit timer.  
I Enhanced UART with a fractional baud rate generator, break detect, framing error  
detection, and automatic address detection; 400 kHz byte-wide I2C-bus  
communication port.  
I 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or  
driven to 5.5 V).  
I Enhanced low voltage (brownout) detect allows a graceful system shutdown when  
power fails.  
I 20-pin TSSOP and DIP packages with 15 I/O pins minimum and up to 18 I/O pins  
while using on-chip oscillator and reset options.  

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