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P89LPC9321FA PDF预览

P89LPC9321FA

更新时间: 2024-10-27 09:53:39
品牌 Logo 应用领域
恩智浦 - NXP 闪存微控制器和处理器外围集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
70页 327K
描述
8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM

P89LPC9321FA 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:LCC
包装说明:PLASTIC, MS-018, SOT261-2, LCC-28针数:28
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.81具有ADC:NO
地址总线宽度:位大小:8
CPU系列:8051最大时钟频率:18 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQCC-J28
JESD-609代码:e3长度:9 mm
湿度敏感等级:3I/O 线路数量:26
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC28,.5SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):245
电源:2.5/3.3 V认证状态:Not Qualified
RAM(字节):768ROM(单词):8192
ROM可编程性:FLASH座面最大高度:4.57 mm
速度:18 MHz子类别:Microcontrollers
最大压摆率:23 mA最大供电电压:3.6 V
最小供电电压:2.4 V标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:9 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

P89LPC9321FA 数据手册

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P89LPC9321  
8-bit microcontroller with accelerated two-clock 80C51 core  
8 kB 3 V byte-erasable flash with 512-byte data EEPROM  
Rev. 01 — 9 December 2008  
Product data sheet  
1. General description  
The P89LPC9321 is a single-chip microcontroller, available in low cost packages, based  
on a high performance processor architecture that executes instructions in two to four  
clocks, six times the rate of standard 80C51 devices. Many system-level functions have  
been incorporated into the P89LPC9321 in order to reduce component count, board  
space, and system cost.  
2. Features  
2.1 Principal features  
I 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages.  
Single-byte erasing allows any byte(s) to be used as non-volatile data storage.  
I 256-byte RAM data memory and a 512-byte auxiliary on-chip RAM.  
I 512-byte customer data EEPROM on-chip allows serialization of devices, storage of  
setup parameters, etc.  
I Two analog comparators with selectable inputs and reference source.  
I Single Programmable Gain Amplifier (PGA) with selectable gains of 2x, 4x, 8x, or 16x  
can be applied to analog comparator inputs.  
I Two 16-bit counter/timers (each may be configured to toggle a port output upon timer  
overflow or to become a PWM output).  
I A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit  
prescaler and a programmable and readable 16-bit timer.  
I Enhanced UART with a fractional baud rate generator, break detect, framing error  
detection, and automatic address detection; 400 kHz byte-wide I2C-bus  
communication port and SPI communication port.  
I Capture/Compare Unit (CCU) provides PWM, input capture, and output compare  
functions.  
I 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or  
driven to 5.5 V).  
I 4-level low voltage (brownout) detect allows a graceful system shutdown when power  
fails. May optionally be configured as an interrupt.  
I 28-pin TSSOP, PLCC and DIP packages with 23 I/O pins minimum and up to 26 I/O  
pins while using on-chip oscillator and reset options.  

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