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P89LPC932FHN PDF预览

P89LPC932FHN

更新时间： 2024-10-26 22:11:47
品牌 Logo 应用领域
恩智浦 - NXP 闪存微控制器可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
60页 281K
描述
8-bit microcontroller with accelerated two-clock 80C51 core 8 kB Flash with 512-byte data EEPROM and 768-byte RAM

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P89LPC932FHN 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：6 X 6 MM, 0.85 MM HEIGHT, MO-220, SOT-788-1, PLASTIC, HVQFN-28针数：28
Reach Compliance Code：compliantHTS代码：8542.31.00.01
风险等级：5.82具有ADC：NO
地址总线宽度：位大小：8
CPU系列：8051最大时钟频率：12 MHz
DAC 通道：NODMA 通道：NO
外部数据总线宽度：JESD-30 代码：S-PQCC-N28
长度：6 mmI/O 线路数量：26
端子数量：28最高工作温度：70 °C
最低工作温度：PWM 通道：YES
封装主体材料：PLASTIC/EPOXY封装代码：VQCCN
封装等效代码：LCC28,.24SQ,25封装形状：SQUARE
封装形式：CHIP CARRIER, VERY THIN PROFILE电源：2.5/3.3 V
认证状态：Not QualifiedRAM（字节）：768
ROM（单词）：8192ROM可编程性：FLASH
座面最大高度：1 mm速度：12 MHz
子类别：Microcontrollers最大压摆率：18 mA
最大供电电压：3.6 V最小供电电压：2.4 V
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：NO LEAD端子节距：0.65 mm
端子位置：QUAD宽度：6 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLERBase Number Matches：1

P89LPC932FHN 数据手册

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P89LPC932  
8-bit microcontroller with accelerated two-clock 80C51 core  
8 kB Flash with 512-byte data EEPROM and 768-byte RAM  
Rev. 04 — 06 January 2004  
Product data  
1. General description  
The P89LPC932 is a single-chip microcontroller, available in low cost packages,  
based on a high performance processor architecture that executes instructions in two  
to four clocks, six times the rate of standard 80C51 devices. Many system-level  
functions have been incorporated into the P89LPC932 in order to reduce component  
count, board space, and system cost.  
2. Features  
■ A high performance 80C51 CPU provides instruction cycle times of 167-333 ns for  
all instructions except multiply and divide when executing at 12 MHz. This is  
6 times the performance of the standard 80C51 running at the same clock  
frequency. A lower clock frequency for the same performance results in power  
savings and reduced EMI.  
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or  
driven to 5.5 V).  
■ 8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page size.  
■ 256-byte RAM data memory. 512-byte auxiliary on-chip RAM.  
■ 512-byte customer Data EEPROM on chip allows serialization of devices, storage  
of set-up parameters, etc.  
■ Two 16-bit counter/timers. Each timer may be configured to toggle a port output  
upon timer overflow or to become a PWM output.  
■ Real-Time clock that can also be used as a system timer.  
■ Capture/Compare Unit (CCU) provides PWM, input capture, and output compare  
functions.  
■ Two analog comparators with selectable inputs and reference source.  
■ Enhanced UART with fractional baud rate generator, break detect, framing error  
detection, automatic address detection and versatile interrupt capabilities.  
■ 400 kHz byte-wide I2C-bus communication port.  
■ SPI communication port.  
■ Eight keypad interrupt inputs, plus two additional external interrupt inputs.  
■ Four interrupt priority levels.  
■ Watchdog timer with separate on-chip oscillator, requiring no external  
components. The watchdog prescaler is selectable from 8 values.  
■ Active-LOW reset. On-chip power-on reset allows operation without external reset  
components. A reset counter and reset glitch suppression circuitry prevent  
spurious and incomplete resets. A software reset function is also available.  
■ Low voltage reset (Brownout detect) allows a graceful system shutdown when  
power fails. May optionally be configured as an interrupt.  
1234567...60

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