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NVTYS009N08HLTWG

更新时间： 2024-11-26 11:14:15
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安森美 - ONSEMI /
页数 文件大小 规格书
7页 393K
描述
MOSFET – Power, Single, N-Channel,

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NVTYS009N08HLTWG 数据手册

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MOSFET - Power, Single  
N-Channel  
80 V, 9 mW, 58 A  
Product Preview  
NVTYS009N08HL  
www.onsemi.com  
Features  
• Small Footprint (3.3 x 3.3 mm) for Compact Design  
• Low R  
to Minimize Conduction Losses  
• Low Capacitance to Minimize Driver Losses  
• AEC−Q101 Qualified and PPAP Capable  
DS(on)  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(on)  
9 mW @ 10 V  
80 V  
58 A  
• These Devices are Pb−Free and are RoHS Compliant  
10.9 mW @ 4.5 V  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Parameter  
Drain−to−Source Voltage  
Symbol  
Value  
80  
Unit  
V
V
DSS  
N−Channel  
D (5 − 8)  
Gate−to−Source Voltage  
V
GS  
20  
V
Continuous Drain  
Current R  
T
= 25°C  
= 100°C  
= 25°C  
I
D
58  
A
C
q
JC  
T
C
41  
(Notes 1, 2, 3, 4)  
Steady  
State  
Power Dissipation  
T
C
P
D
73  
W
A
G (4)  
R
(Notes 1, 2, 3)  
q
JC  
T
C
= 100°C  
37  
Continuous Drain  
Current R  
T = 25°C  
A
I
D
12  
S (1, 2, 3)  
q
JA  
T = 100°C  
A
9
(Notes 1, 3, 4)  
Steady  
State  
Power Dissipation  
T = 25°C  
A
P
D
3.2  
1.6  
279  
W
R
(Notes 1, 3)  
q
JA  
T = 100°C  
A
Pulsed Drain Current  
T
C
= 25°C, t = 10 ms  
I
DM  
A
p
Operating Junction and Storage Temperature  
Range  
T , T  
−55 to  
+175  
°C  
J
stg  
LFPAK8  
3.3x3.3  
Source Current (Body Diode)  
I
S
61  
A
CASE 760AD  
Single Pulse Drain−to−Source Avalanche  
E
AS  
199  
mJ  
Energy (I  
= 3.4 A)  
L(pk)  
Lead Temperature for Soldering Purposes  
(1/8″ from case for 10 s)  
T
L
260  
°C  
MARKING DIAGRAM  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
009N  
08HL  
AWLYW  
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)  
Parameter  
Symbol  
Value  
2
Unit  
Junction−to−Case − Steady State (Note 3)  
Junction−to−Ambient − Steady State (Note 3)  
R
°C/W  
A
= Assembly Location  
q
JC  
WL = Wafer Lot  
R
46  
q
JA  
Y
W
= Year  
= Work Week  
1. The entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
2. Psi (Y) is used as required per JESD51−12 for packages in which  
substantially less than 100% of the heat flows to single case surface.  
2
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.  
4. Continuous DC current rating. Maximum current for pulses as long as 1  
second is higher but is dependent on pulse duration and duty cycle.  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information on  
page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2021  
1
Publication Order Number:  
March, 2021 − Rev. P2  
NVTYS009N08HL/D  
 
1234567

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