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NUP4114UPXV6 PDF预览

NUP4114UPXV6

更新时间: 2024-11-23 06:00:43
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
9页 175K
描述
Transient Voltage Suppressors

NUP4114UPXV6 数据手册

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NUP4114UPXV6  
Transient Voltage  
Suppressors  
Low Capacitance ESD Protection for  
High Speed Data  
http://onsemi.com  
MARKING  
The NUP4114UPXV6 transient voltage suppressor is designed to  
protect high speed data lines from ESD. Ultralow capacitance and  
high level of ESD protection makes this device well suited for use in  
USB 2.0 applications.  
6
DIAGRAM  
1
SOT563  
CASE 463A  
P4MG  
Features  
G
1
Low Capacitance 0.8 pF  
Low Clamping Voltage  
P4 = Specific Device Code  
M
= Date Code  
Stand Off Voltage: 5 V  
G
= PbFree Package  
(Note: Microdot may be in either location)  
Low Leakage  
Protection for the Following IEC Standards:  
IEC 6100042 Level 4 ESD Protection  
UL Flammability Rating of 94 V0  
This is a PbFree Device  
PIN CONFIGURATION  
AND SCHEMATIC  
Typical Applications  
I/O 1  
6 I/O  
High Speed Communication Line Protection  
USB 2.0 High Speed Data Line and Power Line Protection  
Monitors and Flat Panel Displays  
MP3  
V
2
5 V  
P
N
I/O 3  
4 I/O  
Gigabit Ethernet  
Notebook Computers  
Digital Video Interface (DVI) and HDMI  
ORDERING INFORMATION  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Device  
Package  
Shipping  
Rating  
Symbol  
Value  
40 to +125  
55 to +150  
260  
Unit  
°C  
NUP4114UPXV6T1G SOT563  
(PbFree)  
4000 /  
Tape & Reel  
Operating Junction Temperature Range  
Storage Temperature Range  
T
J
T
stg  
°C  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
Lead Solder Temperature −  
Maximum (10 Seconds)  
T
°C  
L
Human Body Model (HBM)  
Machine Model (MM)  
IEC 6100042 Contact (ESD)  
ESD  
16000  
400  
13000  
V
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
See Application Note AND8308/D for further description of  
survivability specs.  
©
Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
September, 2009 Rev. 1  
NUP4114UPXV6/D  

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