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NLX3G14BMX1TCG PDF预览

NLX3G14BMX1TCG

更新时间: 2024-11-05 06:00:55
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
8页 117K
描述
Triple Schmitt-Trigger Inverter

NLX3G14BMX1TCG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:LGA包装说明:1.60 X 1 MM, 0.40 MM PITCH, LEAD FREE, ULLGA-8
针数:8Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.71系列:HC
JESD-30 代码:R-XDSO-N8JESD-609代码:e4
长度:1.6 mm负载电容(CL):15 pF
逻辑集成电路类型:INVERTER最大I(ol):0.008 A
湿度敏感等级:1功能数量:3
输入次数:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:UNSPECIFIED封装代码:VSON
封装等效代码:SOLCC8,.04,16封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
电源:1.8/5 VProp。Delay @ Nom-Sup:9.1 ns
传播延迟(tpd):9.1 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:0.4 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.4 mm
端子位置:DUAL宽度:1 mm
Base Number Matches:1

NLX3G14BMX1TCG 数据手册

 浏览型号NLX3G14BMX1TCG的Datasheet PDF文件第2页浏览型号NLX3G14BMX1TCG的Datasheet PDF文件第3页浏览型号NLX3G14BMX1TCG的Datasheet PDF文件第4页浏览型号NLX3G14BMX1TCG的Datasheet PDF文件第5页浏览型号NLX3G14BMX1TCG的Datasheet PDF文件第6页浏览型号NLX3G14BMX1TCG的Datasheet PDF文件第7页 
NLX3G14  
Triple Schmitt-Trigger  
Inverter  
The NLX3G14 MiniGatet is an advanced highspeed CMOS  
triple Schmitttrigger inverter in ultrasmall footprint.  
The NLX3G14 input and output structures provide protection when  
voltages up to 7.0 V are applied, regardless of the supply voltage.  
The NLX3G14 can be used to enhance noise immunity or to square  
up slowly changing waveforms.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
ULLGA8  
1.45 x 1.0  
CASE 613AA  
Designed for 1.65 V to 5.5 V V Operation  
FM  
CC  
1
Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
CC  
A
24 Balanced Output Source and Sink Capability  
Balanced Propagation Delays  
ULLGA8  
1.6 x 1.0  
CASE 613AB  
ACM  
G
Overvoltage Tolerant (OVT) Input and Output Pins  
UltraSmall Packages  
1
These are PbFree Devices  
ULLGA8  
1.95 x 1.0  
ACM  
G
CASE 613AC  
1
IN A1  
OUT Y3  
IN A2  
1
2
3
4
8
7
6
5
V
CC  
F or AC = Specific Device Code  
M
= Date Code  
G
= PbFree Package  
OUT Y1  
IN A3  
PIN ASSIGNMENT  
1
2
3
4
5
6
7
8
IN A1  
OUT Y3  
IN A2  
GND  
OUT Y2  
GND  
OUT Y2  
Figure 1. Pinout (Top View)  
IN A3  
OUT Y1  
1
IN A1  
OUT Y1  
OUT Y2  
OUT Y3  
V
CC  
1
1
IN A2  
IN A3  
FUNCTION TABLE  
A
Y
L
H
H
L
Figure 2. Logic Symbol  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2008  
1
Publication Order Number:  
November, 2008 Rev. 0  
NLX3G14/D  

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